Orthogonal impedance tuning and feed forward equalization for segmented multiple level SST transmitter
Embodiments of the present disclosure provide systems and methods for implementing separate and orthogonal impedance tuning (Zcal) and feed forward equalization (FFE) operations of a segmented multiple level source-series terminated (SST) transmitter. An SST transmitter output driver comprising a plurality of parallel-connected output driver slices coupled to a data communication link and a multiple-tap FFE unit comprising at least one pre-cursor tap, main tap or post-cursor tap. The system performs impedance tuning within each of the plurality of parallel-connected output driver slices of the output driver. The system performs FFE resolution on the plurality of parallel-connected output driver slices of the output driver by assigning respective ones of the plurality of parallel-connected output driver slices to a specific FFE tap of the of the at least one pre-cursor tap, main tap or post-cursor tap of the FFE unit.
1 . A method comprising:
providing (i) a segmented multiple level source-series terminated (SST) transmitter comprising an output driver comprising a plurality of parallel-connected output driver slices coupled to a data communication link and (ii) a multiple-tap feed forward equalization (FFE) unit comprising at least one pre-cursor tap, main tap, or post-cursor tap;
performing impedance tuning within each of the plurality of parallel-connected output driver slices of the output driver, the impedance tuning further comprising:
performing fine impedance tuning; and
performing coarse impedance tuning within each of the plurality of parallel-connected output driver slices; and
performing FFE resolution on the plurality of parallel-connected output driver slices of the output driver by assigning respective ones of the plurality of parallel-connected output driver slices to a specific FFE tap of the at least one pre-cursor tap, main tap or post-cursor tap of the multiple-tap FFE unit.
2 . The method of claim 1 , wherein performing the fine impedance tuning comprises applying control code to control a set of output driver header and footer devices of each output driver slice, wherein the controlled output driver header and footer devices are fully turned on or off.
3 . The method of claim 2 , wherein the set of controlled output driver header and footer devices comprises Process, Voltage, and Temperature (PVT) header and footer output driver header and footer transistors.
4 . The method of claim 1 , wherein each output driver slice comprises a plurality of parallel-scaled voltage mode driver stages within each driver slice and wherein performing the coarse impedance tuning comprises applying a control code to binary weighted groups of the parallel-scaled voltage mode driver stages within the driver slice.
5 . The method of claim 1 , wherein performing the fine impedance tuning and performing the coarse impedance tuning within each of the plurality of parallel-connected output driver slices is separate and independent from the performing the FFE resolution.
6 . The method of claim 1 , wherein performing the impedance tuning comprises iteratively performing a combination of fine impedance tuning and coarse impedance tuning operations to provide an optimal output impedance of the output driver.
7 . The method of claim 1 , wherein the performing FFE resolution is separate and independent from performing the impedance tuning within each output driver slice.
8 . The method of claim 1 , wherein the output driver includes a set number of the parallel-connected output driver slices and wherein both the impedance tuning and the FFE resolution are separately performed based on the set number of the parallel-connected output driver slices, with each of the parallel-connected output driver slices enabled.
9 . The method of claim 1 , wherein the segmented multiple level SST transmitter transmits a functional serial data stream with a Pulse Amplitude Modulation, 4 Levels (PAM4) signal modulation format to the data communication link after completing the impedance tuning and the FFE resolution for the transmitter output driver.
10 . A source-series terminated (SST) transmitter comprising:
an output stage driver comprising a plurality of parallel-connected output driver slices coupled to a data communication link;
a multiple-tap feed forward equalization (FFE) unit comprising at least one pre-cursor tap, main tap, or and post-cursor tap; and
an impedance tuning and FFE control component configured for both implementing impedance tuning and implementing FFE resolution, where the impedance tuning comprises performing fine impedance tuning and coarse impedance tuning within each of the plurality of parallel-connected output driver slices; and where implementing the FFE resolution for the output stage driver comprises performing FFE resolution on the parallel-connected output driver slices by assigning respective ones of the plurality of parallel-connected output driver slices to a specific FFE tap of the at least one pre-cursor tap, main tap or post-cursor tap of the multiple-tap FFE unit.
11 . The SST transmitter of claim 10 , wherein performing the fine impedance tuning comprises applying control code to control a set of output driver header and footer devices of each output driver slice, wherein the controlled output driver header and footer devices are fully turned on or off.
12 . The SST transmitter of claim 10 , wherein each output driver slice comprises a plurality of parallel scaled voltage mode driver stages within each driver slice and wherein performing the coarse impedance tuning comprises applying a control code to binary weighted groups of the parallel scaled voltage mode driver stages within the driver slice.
13 . The SST transmitter of claim 10 , wherein performing the fine impedance tuning and the coarse impedance tuning within each of the plurality of parallel-connected output driver slices is separate and independent from performing the FFE resolution on the parallel-connected output driver slices.
14 . The SST transmitter of claim 10 , wherein the output stage driver includes a set number of the parallel-connected output driver slices and wherein both the impedance tuning and the FFE resolution are independent and separately performed on the set number of the parallel-connected output driver slices, with each of the parallel-connected output driver slices enabled.
15 . The SST transmitter of claim 10 , wherein the SST transmitter comprises a segmented multiple level SST transmitter configured to transmit a functional serial data stream to the data communication link with a Pulse Amplitude Modulation, 4 Levels (PAM4) signal modulation format.
16 . A method comprising:
providing (i) a segmented multiple level source-series terminated (SST) transmitter comprising an output driver comprising a plurality of parallel-connected output driver slices coupled to a data communication link and (ii) a multiple-tap feed forward equalization (FFE) unit comprising at least one pre-cursor tap, main tap, or post-cursor tap;
performing impedance tuning within each of the plurality of parallel-connected output driver slices of the output driver; and
performing FFE resolution on the plurality of parallel-connected output driver slices of the output driver by assigning respective ones of the plurality of parallel-connected output driver slices to a specific FFE tap of the at least one pre-cursor tap, main tap or post-cursor tap of the multiple-tap FFE unit, wherein the segmented multiple level SST transmitter transmits a functional serial data stream with a Pulse Amplitude Modulation, 4 Levels (PAM4) signal modulation format to the data communication link after completing the impedance tuning and the FFE resolution for the output driver.
17 . The method of claim 16 , wherein performing impedance tuning within each of the plurality of parallel-connected output driver slices of the output driver comprises performing fine impedance tuning and coarse impedance tuning, and wherein performing the fine impedance tuning comprises applying a control code to control a set of output driver header and footer devices of each output driver slice.
18 . The method of claim 17 , wherein each of the plurality of parallel-connected output driver slices comprises a plurality of parallel scaled voltage mode driver stages and wherein performing the coarse impedance tuning comprises applying the control code to binary weighted groups of the parallel scaled voltage mode driver stages within each of the plurality of parallel-connected output driver slices.
19 . The method of claim 16 , wherein the output stage driver includes a set number of the parallel-connected output driver slices and wherein performing the impedance tuning and performing the FFE resolution are separately performed on the set number of the parallel-connected output driver slices, with each of the parallel-connected output driver slices enabled.