Display substrate, and display device
A display substrate, including a scan drive control circuit including an input circuit, an output control circuit, and an output circuit; the input circuit is configured to transmit a signal of the signal input terminal to the output control circuit and a signal of the first clock signal terminal or the first voltage terminal to the output control circuit; the output control circuit is configured to store a signal of the first signal terminal, and transmit a signal of the second signal terminal to the first node; or, the output control circuit is configured to store a signal of the second clock signal terminal, and transmit a signal of the second voltage terminal to the first node; the output circuit is configured to output a signal of the first voltage terminal to the signal output terminal, or output the signal of the second voltage terminal to the signal output terminal.
1 . A display substrate, comprising a scan drive control circuit which comprises an input circuit, an output control circuit, and an output circuit;
the input circuit is connected to a signal input terminal, a first clock signal terminal, a first voltage terminal and the output control circuit, and is configured to transmit a signal of the signal input terminal to the output control circuit and transmit a signal of the first clock signal terminal or the first voltage terminal to the output control circuit under control of the first clock signal terminal;
the output control circuit is connected to a first signal terminal, a second signal terminal, a second clock signal terminal, a second voltage terminal, a first node, a second node and the input circuit, and is configured to store a signal of the first signal terminal under control of the input circuit, and transmit a signal of the second signal terminal to the first node under control of the input circuit and the second clock signal terminal; or, the output control circuit is configured to store a signal of the second clock signal terminal under the control of the input circuit, and transmit a signal of the second voltage terminal to the first node under control of the second node; and
the output circuit is connected to the first voltage terminal, the second voltage terminal, a signal output terminal, the first node and the second node, and is configured to output a signal of the first voltage terminal to the signal output terminal under the control of the second node, or to output the signal of the second voltage terminal to the signal output terminal under control of the first node.
2 . The display substrate according to claim 1 , wherein the input circuit comprises: a first input sub-circuit and a second input sub-circuit; the output control circuit comprises a first output control sub-circuit, a second output control sub-circuit and a third output control sub-circuit; the output circuit comprises a first output sub-circuit and a second output sub-circuit;
the first input sub-circuit is connected to the signal input terminal, the first clock signal terminal and the first output control sub-circuit, and is configured to transmit the signal of the signal input terminal to the first output control sub-circuit under the control of the first clock signal terminal;
the second input sub-circuit is connected to the first voltage terminal, the first clock signal terminal, the first input sub-circuit and the second output control sub-circuit, and is configured to transmit a signal of the first clock signal terminal or the first voltage terminal to the second output control sub-circuit under control of the first input sub-circuit or the first clock signal terminal;
the first output control sub-circuit is connected to the first signal terminal, the second clock signal terminal, the second node, the first input sub-circuit and the second input sub-circuit, and is configured to store a signal of the first signal terminal or the second clock signal terminal under the control of the first input sub-circuit or the second input sub-circuit;
the second output control sub-circuit is connected to the second signal terminal, the second clock signal terminal, the first node and the second input sub-circuit, and is configured to transmit the signal of the second signal terminal to the first node under control of the second input sub-circuit and the second clock signal terminal;
the third output control sub-circuit is connected to the second voltage terminal, the first node and the second node, and is configured to transmit the signal of the second voltage terminal to the first node under the control of the second node;
the first output sub-circuit is connected to the first voltage terminal, the signal output terminal and the second node, and is configured to output the signal of the first voltage terminal to the signal output terminal under the control of the second node; and
the second output sub-circuit is connected to the second voltage terminal, the signal output terminal and the first node, and is configured to output the signal of the second voltage terminal to the signal output terminal under the control of the first node.
3 . The display substrate according to claim 2 , wherein the first input sub-circuit comprises: a first transistor, a control electrode of the first transistor is connected to the first clock signal terminal, a first electrode of the first transistor is connected to the signal input terminal, and a second electrode of the first transistor is connected to the second node;
the second input sub-circuit comprises a second transistor and a third transistor; a control electrode of the second transistor is connected to the second node, a first electrode of the second transistor is connected to the first clock signal terminal, and a second electrode of the second transistor is connected to a third node; a control electrode of the third transistor is connected to the first clock signal terminal, a first electrode of the third transistor is connected to the first voltage terminal, and a second electrode of the third transistor is connected to the third node;
the first output control sub-circuit comprises a fourth transistor and a fifth transistor; a control electrode of the fourth transistor is connected to the second node, a first electrode of the fourth transistor is connected to the second clock signal terminal, and a second electrode of the fourth transistor is connected to a second electrode of the fifth transistor; a control electrode of the fifth transistor is connected to the third node, and a first electrode of the fifth transistor is connected to the first signal terminal; and
the first output sub-circuit comprises a tenth transistor, a control electrode of the tenth transistor is connected to the second node, a first electrode of the tenth transistor is connected to the first voltage terminal, and a second electrode of the tenth transistor is connected to the signal output terminal.
4 . The display substrate according to claim 2 , wherein the first input sub-circuit comprises: a first transistor, a control electrode of the first transistor is connected to the first clock signal terminal, a first electrode of the first transistor is connected to the signal input terminal, and a second electrode of the first transistor is connected to a fourth node;
the second input sub-circuit comprises a second transistor and a third transistor; a control electrode of the second transistor is connected to the fourth node, a first electrode of the second transistor is connected to the first clock signal terminal, and a second electrode of the second transistor is connected to a third node; a control electrode of the third transistor is connected to the first clock signal terminal, a first electrode of the third transistor is connected to the first voltage terminal, and a second electrode of the third transistor is connected to the third node;
the first output control sub-circuit comprises a fourth transistor, a fifth transistor and an eleventh transistor; a control electrode of the fourth transistor is connected to the second node, a first electrode of the fourth transistor is connected to the second clock signal terminal, and a second electrode of the fourth transistor is connected to a second electrode of the fifth transistor; a control electrode of the fifth transistor is connected to the third node, and a first electrode of the fifth transistor is connected to the first signal terminal; a control electrode of the eleventh transistor is connected to the first voltage terminal, a first electrode of the eleventh transistor is connected to the fourth node, and a second electrode of the eleventh transistor is connected to the second node; and
the first output sub-circuit comprises a tenth transistor; a control electrode of the tenth transistor is connected to the second node, a first electrode of the tenth transistor is connected to the first voltage terminal, and a second electrode of the tenth transistor is connected to the signal output terminal.
5 . The display substrate according to claim 3 , wherein the second output control sub-circuit further comprises: a fourth capacitor, a first electrode of the fourth capacitor is connected to the control electrodes of the fourth transistor and the tenth transistor.
6 . The display substrate according to claim 5 , wherein a second electrode of the fourth capacitor is connected to the fifth transistor.
7 . The display substrate of claim 3 , wherein the first output control sub-circuit further comprises: a second capacitor, a first electrode of the second capacitor is connected to the second node.
8 . The display substrate according to claim 7 , wherein a second electrode of the second capacitor is connected to the signal output terminal.
9 . The display substrate according to claim 2 , wherein the second input sub-circuit is connected to a third node;
the second output control sub-circuit comprises a sixth transistor, a seventh transistor and a first capacitor;
a control electrode of the sixth transistor is connected to the third node, a first electrode of the sixth transistor is connected to the second signal terminal, and a second electrode of the sixth transistor is connected to a second electrode of the seventh transistor; a control electrode of the seventh transistor is connected to the second clock signal terminal, and a first electrode of the seventh transistor is connected to the first node; and
a first electrode of the first capacitor is connected to the control electrode of the sixth transistor, and a second electrode of the first capacitor is connected to the seventh transistor.
10 . The display substrate according to claim 2 , wherein the second input sub-circuit is connected to a fifth node;
the second output control sub-circuit comprises a first capacitor, a sixth transistor, a seventh transistor, and a twelfth transistor;
a control electrode of the sixth transistor is connected to a third node, a first electrode of the sixth transistor is connected to the second signal terminal, and a second electrode of the sixth transistor is connected to a second electrode of the seventh transistor; a control electrode of the seventh transistor is connected to the second clock signal terminal, and a first electrode of the seventh transistor is connected to the first node;
a control electrode of the twelfth transistor is connected to the first voltage terminal, a first electrode of the twelfth transistor is connected to the fifth node, and a second electrode of the twelfth transistor is connected to the third node; and
a first electrode of the first capacitor is connected to the control electrode of the sixth transistor, and a second electrode of the first capacitor is connected to the seventh transistor.
11 . The display substrate according to claim 2 , wherein the third output control sub-circuit comprises: an eighth transistor and a third capacitor;
a control electrode of the eighth transistor is connected to the second node, a first electrode of the eighth transistor is connected to the second voltage terminal, and a second electrode of the eighth transistor is connected to the first node;
a first electrode of the third capacitor is connected to the first node, and a second electrode of the third capacitor is connected to the second voltage terminal;
the second output sub-circuit comprises a ninth transistor, a control electrode of the ninth transistor is connected to the first node, a first electrode of the ninth transistor is connected to the second voltage terminal, and a second electrode of the ninth transistor is connected to the signal output terminal.
12 . The display substrate according to claim 1 , wherein the first signal terminal is connected to the second voltage terminal or the first clock signal terminal.
13 . The display substrate according to claim 1 , wherein the second signal terminal is connected to the first voltage terminal or the second clock signal terminal.
14 . A method for driving a display substrate, applied to the display substrate according to claim 1 , the method comprising:
the input circuit transmits the signal of the signal input terminal to the output control circuit, and transmits the signal of the first clock signal terminal or the first voltage terminal to the output control circuit under control of the first clock signal terminal;
the output control circuit stores the signal of the first signal terminal under control of the input circuit, transmits the signal of the second signal terminal to the first node under control of the input circuit and the second clock signal terminal, and the output circuit outputs the signal of the second voltage terminal to the signal output terminal under control of the first node; and
the output control circuit stores the signal of the second clock signal terminal under the control of the input circuit, and transmits the signal of the second voltage terminal to the first node under control of the second node, and the output circuit outputs the signal of the first voltage terminal to the signal output terminal under the control of the second node.
15 . A display device, comprising the display substrate according to claim 1 .