IP Library › Granted Patent US 12,519,088
Granted Patent B2
US 12,519,088 · App. 17/638,710 · Granted Jan 6, 2026

Method for producing radiation-emitting semiconductor chips, radiation-emitting semiconductor chip and radiation-emitting component

Inventors: Alexander F. Pfeuffer (Regensburg, DE); Tobias Meyer (Kelheim, DE); Korbinian Perzlmaier (Regensburg, DE); Thomas Schwarz (Regensburg, DE); Sebastian Hoibl (Kiefersfelden, DE)
Assignee: OSRAM Opto Semiconductors GmbH
H01L25/0753H10H20/01H10H20/857H10H20/0364
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Quick Facts
Patent No.
US 12,519,088
App. No.
17/638,710
Granted
Jan 6, 2026
Kind
B2
Abstract

In an embodiment a method for producing radiation-emitting semiconductor chips includes providing a semiconductor wafer, applying first contact layers on the semiconductor wafer, applying a second dielectric layer on the semiconductor wafer and the first contact layers, attaching a carrier arrangement to the semiconductor wafer, singulating the semiconductor wafer into semiconductor bodies and applying second contact layers on the semiconductor bodies, wherein the second dielectric layer is formed such that it mechanically stabilizes itself.

Claims (54)

1 . A method for producing radiation-emitting semiconductor chips, the method comprising:

providing a semiconductor wafer;

applying a first dielectric layer to the semiconductor wafer;

creating first recesses in the first dielectric layer;

applying first contact layers on the semiconductor wafer in the first recesses;

applying a second dielectric layer on the first dielectric layer and the first contact layers;

forming fourth recesses in the second dielectric layer;

attaching a carrier arrangement to the semiconductor wafer;

singulating the semiconductor wafer into semiconductor bodies; and

applying second contact layers on the semiconductor bodies,

wherein the second dielectric layer is formed such that it mechanically stabilizes itself, and

wherein each fourth recess overlaps in lateral directions with one of the first recesses.

2 . The method according to claim 1 , further comprising:

forming a sacrificial layer in a single contiguous manner on the semiconductor wafer,

wherein the carrier arrangement comprises a second carrier layer and a third carrier layer, and

wherein the second carrier layer is applied to the sacrificial layer.

3 . The method according to claim 1 , further comprising, after applying the first contact layers, creating a sacrificial layer penetrated by openings on the semiconductor wafer,

wherein the carrier arrangement is fixed to the sacrificial layer,

wherein holding elements of the carrier arrangement are each formed in an opening of the sacrificial layer, and

wherein the sacrificial layer is removed in such a way that the carrier arrangement is mechanically connected to the semiconductor bodies only in a region of the holding elements.

4 . The method according to claim 1 , further comprising:

forming fifth recesses spaced apart in the lateral directions from the first recesses in the second dielectric layer; and

arranging second contacts in each of the fifth recesses.

5 . The method according to claim 4 , further comprising:

applying a passivation layer; and

applying further second contact layers on side surfaces of the passivation layer,

wherein the second contact layers and the further second contact layers each electrically conductively connect one of the second contacts with a respective one of the exposed semiconductor bodies.

6 . The method according to claim 1 , further comprising applying a passivation layer over the semiconductor bodies, after singulating the semiconductor wafer.

7 . The method according to claim 6 , further comprising:

forming second recesses in the passivation layer, the second recesses being spaced apart in the lateral directions from the semiconductor bodies; and

forming third recesses, each overlapping in the lateral directions with one of the semiconductor bodies in the passivation layer,

wherein each of the third recesses exposes a region of one of the semiconductor bodies.

8 . The method according to claim 7 , wherein each of the second contact layers is applied to one of the exposed semiconductor bodies.

9 . The method according to claim 7 , further comprising applying further first contact layers on side surfaces of the passivation layer, wherein each of the further first contact layers is electrically conductively connected with one of the first contact layers in a respective one of the second recesses.

10 . A radiation emitting semiconductor chip comprising:

a semiconductor body configured to emit electromagnetic radiation;

a first contact layer with a first recess;

a second contact layer;

a first dielectric layer in the first recess; and

a second dielectric layer arranged on the first dielectric layer and the first contact layer,

wherein the second dielectric layer mechanically stabilizes itself,

wherein a current is impressable into the semiconductor body through the first contact layer and the second contact layer, and

wherein a fourth recess is arranged in the second dielectric layer, the fourth recess overlapping in lateral directions with the first recess.

11 . The radiation emitting semiconductor chip according to claim 10 , wherein the first contact layer and the second contact layer comprise a transparent conductive material.

12 . The radiation emitting semiconductor chip according to claim 10 ,

wherein the first contact layer is arranged on a bottom surface of the semiconductor body, and

wherein the first contact layer extends from the bottom surface of the semiconductor body into the semiconductor body.

13 . A radiation emitting device comprising:

the radiation emitting semiconductor chip according to claim 10 ; and

a carrier comprising at least a first contact element,

wherein the radiation emitting semiconductor chip is arranged on the carrier by a direct bond connection and/or an adhesive.

14 . The radiation emitting device according to claim 13 , wherein the carrier and/or the first contact element are configured to be transparent to the electromagnetic radiation emitted by the semiconductor body.

15 . The radiation emitting device according to claim 13 , wherein the first contact element is configured to be reflective for the electromagnetic radiation emitted by the semiconductor body.

16 . The radiation emitting device according to claim 15 , wherein the first contact element comprises a curved shape.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE TYPOGRAPHICAL ERROR OF ASSIGEE'S COUNTRY PREVIOUSLY RECORDED AT REEL: 061316 FRAME: 0832. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 2, 2022
From: HOIBL, SEBASTIAN
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 062048/0965 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2022
From: PFEUFFER, ALEXANDER F.; MEYER, TOBIAS; PERZLMAIER, KORBINIAN; SCHWARZ, THOMAS
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 060898/0956 →
EMPLOYMENT AGREEMENT Recorded Aug 25, 2022
From: HOIBL, SEBASTIAN
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 061316/0832 →
Priority Claims (2)
DE 102019123188.4 · Aug 29, 2019 · national
DE 102019131502.6 · Nov 21, 2019 · national
Continuity (1)
Related Publication 20220406757A1 · Dec 22, 2022
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