IP Library › Granted Patent US 12,519,563
Granted Patent B2
US 12,519,563 · App. 18/310,687 · Granted Jan 6, 2026

Waveform based data integrity check and error correction

Inventors: Kyle Jung-Lin Pan (St. James, NY); Fengjun Xi (San Diego, CA); Byung K. Yi (San Diego, CA); Robert L. Olesen (Huntington, NY)
Assignee: InterDigital Patent Holdings, Inc.
H04L1/0047H04B17/336H04L1/0053H04L1/0061H04L1/1829H04L5/0057H04L27/2605H04L27/2636G06F11/10
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Quick Facts
Patent No.
US 12,519,563
App. No.
18/310,687
Granted
Jan 6, 2026
Kind
B2
Abstract

A wireless transmit/receive unit (WTRU) may low-density parity-check (LDPC) encode data into LDPC blocks. Further, the WTRU may produce and append a cyclic redundancy check (CRC) to each of the LDPC blocks. Also, the WTRU may concatenate the plurality of LDPC blocks and appended CRCs. Additionally, the WTRU may produce information associated with error checks. Moreover, the WTRU may produce a codeword using a codebook. The codeword may be based on the information associated with the error checks. In addition, the WTRU may produce an orthogonal frequency-division multiplex (OFDM) signal by mapping the codeword and the concatenated plurality of LDPC blocks and appended CRCs onto resource elements of the OFDM signal. Further, the WTRU may transmit the produced OFDM signal. In a further example, the WTRU may produce an additional CRC in addition to the appended CRCs, and the produced OFDM signal may include the additional CRC.

Claims (40)

1 . A wireless transmit/receive unit (WTRU) comprising:

a processor; and

a transceiver, operatively coupled to the processor; wherein:

the processor is configured to divide data into a plurality of data blocks;

the processor is further configured to produce and append a cyclic redundancy check (CRC) to each of the plurality of data blocks;

the processor is further configured to low-density parity-check (LDPC) encode the plurality of data blocks and appended CRCs into a plurality of LDPC blocks and appended CRCs;

the processor is further configured to concatenate the plurality of LDPC blocks and appended CRCs;

the processor is further configured to produce information associated with error checks;

the processor is further configured to produce a codeword using a codebook, wherein the codeword is based on the information associated with the error checks;

the processor is further configured to produce an orthogonal frequency-division multiplex (OFDM) signal by mapping the codeword and the concatenated plurality of LDPC blocks and appended CRCs onto resource elements of the OFDM signal; and

the processor and the transceiver are configured to transmit the produced OFDM signal.

2 . The WTRU of claim 1 , wherein the processor is further configured to produce an additional CRC in addition to the appended CRCs, wherein the produced OFDM signal includes the additional CRC.

3 . The WTRU of claim 1 , wherein the codeword is mapped to a single OFDM signal.

4 . The WTRU of claim 1 , wherein the codeword is mapped to a plurality of OFDM signals.

5 . The WTRU of claim 1 , wherein the produced OFDM signal includes one or more OFDM symbols.

6 . The WTRU of claim 1 , wherein the LDPC encoding is low-latency LDPC encoding.

7 . A method performed by a wireless transmit/receive unit (WTRU), the method comprising:

dividing data into a plurality of data blocks;

producing and appending a cyclic redundancy check (CRC) to each of the plurality of data blocks;

low-density parity-check (LDPC) encoding the plurality of data blocks and appended CRCs into a plurality of LDPC blocks and appended CRCs;

concatenating the plurality of LDPC blocks and appended CRCs;

producing information associated with error checks;

producing a codeword using a codebook, wherein the codeword is based on the information associated with the error checks;

producing an orthogonal frequency-division multiplex (OFDM) signal by mapping the codeword and the concatenated plurality of LDPC blocks and appended CRCs onto resource elements of the OFDM signal; and

transmitting the produced OFDM signal.

8 . The method of claim 7 , further comprising:

producing an additional CRC in addition to the appended CRCs, wherein the produced OFDM signal includes the additional CRC.

9 . The method of claim 7 , wherein the codeword is mapped to a single OFDM signal.

10 . The method of claim 7 , wherein the codeword is mapped to a plurality of OFDM signals.

11 . The method of claim 7 , wherein the produced OFDM signal includes one or more OFDM symbols.

12 . The method of claim 7 , wherein the LDPC encoding is low-latency LDPC encoding.

13 . A wireless transmit/receive unit (WTRU) comprising:

a processor; and

a transceiver, operatively coupled to the processor; wherein:

the transceiver is configured to receive an orthogonal frequency-division multiplex (OFDM) signal produced by mapping a codeword and a concatenated plurality of low-density parity-check (LDPC) blocks and appended cyclic redundancy checks (CRCs) onto resource elements of the OFDM signal, wherein the codeword is produced by using a codebook, wherein the codeword is based on information associated with error checks.

14 . The WTRU of claim 13 , wherein the received OFDM signal includes an additional CRC in addition to the appended CRCs.

15 . The WTRU of claim 13 , wherein the codeword is mapped to a single OFDM signal.

16 . The WTRU of claim 13 , wherein the codeword is mapped to a plurality of OFDM signals.

17 . The WTRU of claim 13 , wherein the produced OFDM signal includes one or more OFDM symbols.

18 . The WTRU of claim 13 , wherein LDPC encoding, of the LDPC blocks, is low-latency LDPC encoding.

Continuity (3)
Continuation 16066861
Provisional Application 62273966 · Dec 31, 2015
Related Publication 20230275695A1 · Aug 31, 2023
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