IP Library Granted Patent US 12,525,518
Granted Patent B2
US 12,525,518 · App. 18/314,626 · Granted Jan 13, 2026

Semiconductor device and method of forming double-sided rectifying antenna on power module

Inventors: Chunhe Quan (Seoul, KR); JinYoung Lee (Incheon, KR); Hyungwoo Park (Seoul, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/49811H01L21/4857H01L23/49822H01Q1/2283
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,525,518
App. No.
18/314,626
Granted
Jan 13, 2026
Kind
B2
Abstract

A semiconductor device has a substrate and a first electrical interconnect structure formed over a first surface of the substrate. A second electrical interconnect structure is formed over a second surface of the substrate. An electrical component is disposed over the first surface of the substrate or over the second surface of the substrate. A first antenna is formed over the first electrical interconnect structure. A second antenna is formed over the second electrical interconnect structure. The first electrical interconnect structure has an insulating material formed over the first surface of the substrate, and a conductive via formed through the insulating material. Alternatively, the first electrical interconnect structure has an insulating layer formed over the first surface of the substrate, a conductive layer formed over the insulating layer, and a conductive via formed through the insulating layer and conductive layer.

Claims (74)

1 . A semiconductor device, comprising:

a substrate;

a first electrical interconnect structure formed over a first surface of the substrate;

a first conductive via extending through the substrate and further extending through the first electrical interconnect structure;

a second electrical interconnect structure formed over a second surface of the substrate opposite the first surface of the substrate;

a device layer formed over the second electrical interconnect structure;

a second conductive via extending through the device layer;

a first antenna formed over the first electrical interconnect structure; and

a second antenna formed over the device layer.

2 . The semiconductor device of claim 1 , wherein the device layer includes an electrical component disposed over the second surface of the substrate.

3 . The semiconductor device of claim 2 , wherein the device layer further includes

an insulating material formed over the electrical component and second surface of the substrate.

4 . The semiconductor device of claim 1 , further including:

an insulating layer formed over the first surface of the substrate or over the second surface of the substrate;

a conductive layer formed over the insulating layer; and

a conductive via formed through the insulating layer and conductive layer.

5 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.

6 . The semiconductor device of claim 1 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna.

7 . A semiconductor device, comprising:

a substrate;

a first antenna disposed over a first surface of the substrate; and

a second antenna disposed over a second surface of the substrate opposite the first surface of the substrate and adapted to operate simultaneously with the first antenna and at a different frequency from the first antenna;

further including:

a first electrical interconnect structure formed over the first surface of the substrate;

a first conductive via extending through the substrate and first electrical interconnect structure;

a second electrical interconnect structure formed over the second surface of the substrate;

a device layer formed over the second electrical interconnect structure; and

a second conductive via extending through the device layer.

8 . The semiconductor device of claim 7 , further including an electrical component disposed over the first surface of the substrate or over the second surface of the substrate.

9 . The semiconductor device of claim 7 , wherein the device layer includes

an insulating material formed over the second surface of the substrate.

10 . The semiconductor device of claim 7 , further including:

an insulating layer formed over the first surface of the substrate or over the second surface of the substrate;

a conductive layer formed over the insulating layer; and

a conductive via formed through the insulating layer and conductive layer.

11 . The semiconductor device of claim 7 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.

12 . The semiconductor device of claim 7 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna.

13 . A method of making a semiconductor device, comprising:

providing a substrate;

forming a first electrical interconnect structure over a first surface of the substrate;

forming a first conductive via extending through the substrate and first electrical interconnect structure;

forming a second electrical interconnect structure over a second surface of the substrate opposite the first surface of the substrate;

forming a first antenna over the first electrical interconnect structure; and

forming a second antenna over the second electrical interconnect structure.

14 . The method of claim 13 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate.

15 . The method of claim 13 , further including:

forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and

forming a conductive via through the insulating material.

16 . The method of claim 13 , further including:

forming an insulating layer over the first surface of the substrate or over the second surface of the substrate;

forming a conductive layer over the insulating layer; and

forming a conductive via through the insulating layer and conductive layer.

17 . The method of claim 13 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.

18 . The method of claim 13 , wherein the first electrical interconnect structure and second electrical interconnect structure provide isolation between the first antenna and second antenna.

19 . The method of claim 13 , further including:

forming a device layer over the second electrical interconnect structure; and

forming a second conductive via extending through the device layer, wherein the second antenna is formed over the device layer.

20 . A method of making a semiconductor device, comprising:

providing a substrate;

disposing a first antenna over a first surface of the substrate;

disposing a second antenna over a second surface of the substrate opposite the first surface of the substrate and adapted to operate simultaneously with the first antenna and at a different frequency from the first antenna;

forming a first electrical interconnect structure over the first surface of the substrate;

a second electrical interconnect structure formed over the second surface of the substrate;

forming a device layer over the second electrical interconnect structure; and

forming a second conductive via extending through the device layer, wherein the second antenna is formed over the device layer.

21 . The method of claim 20 , further including disposing an electrical component over the first surface of the substrate or over the second surface of the substrate.

22 . The method of claim 20 , further including:

forming an insulating material over the first surface of the substrate or over the second surface of the substrate; and

forming a conductive via through the insulating material.

23 . The method of claim 20 , further including:

forming an insulating layer over the first surface of the substrate or over the second surface of the substrate;

forming a conductive layer over the insulating layer; and

forming a conductive via through the insulating layer and conductive layer.

24 . The method of claim 20 , wherein the first electrical interconnect structure and second electrical interconnect structure and first antenna and second antenna are each disposed at a different vertical displacement from the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2023
From: QUAN, CHUNHE; LEE, JINYOUNG; PARK, HYUNGWOO
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 063585/0302 →
Continuity (1)
Related Publication 20240379511A1 · Nov 14, 2024
References Cited (10)
US 7664354B2 · Keller et al. · 2010 [cited by applicant]
US 10192796B2 · Lin · 2019 [cited by examiner]
US 10431892B2 · Garcia et al. · 2019 [cited by applicant]
US 11018098B2 · Kaeding · 2021 [cited by examiner]
US 11600932B2 · Tang et al. · 2023 [cited by applicant]
US 20140252595A1 · Yen et al. · 2014 [cited by applicant]
US 20210358872A1 · Pietambaram et al. · 2021 [cited by applicant]
US 20220320020A1 · Hsu · 2022 [cited by examiner]
Malik, Bilal Tariq, et al. “Wireless power transfer system for battery-less sensor nodes.” IEEE Access 8 (2020): 95878-95887. [cited by applicant]
Zeng, Miaowang, et al. “A compact dual-band rectenna for GSM900 and GSM1800 energy harvesting.” International Journal of Antennas and Propagation 2018 (2018). [cited by applicant]