IP Library › Granted Patent US 12,525,896
Granted Patent B2
US 12,525,896 · App. 18/486,835 · Granted Jan 13, 2026

Multi-level inverter for wireless power transmission

Inventors: Milisav Danilovic (Watertown, MA); Oguz Atasoy (Delft, NL); Nam Hoai Le (Aarau, CH); David Gellis (Cambridge, MA)
Assignee: WiTricity Corporation
H02M7/4835B60L53/122B60L53/22H02J50/12H02M1/0058H02M7/5387B60L2210/40H02M7/4837H02M7/487
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,525,896
App. No.
18/486,835
Granted
Jan 13, 2026
Kind
B2
Abstract

Described herein are controllers configured for a wireless power system and methods for such controllers and systems. The controller includes a control module configured to generate a first control signal having a first voltage level and a second control signal having a second voltage level and a modulator configured to (a) receive a signal representative of the output current and (b) generate carrier signals based on the output current. When a first carrier signal is greater than the first voltage level, a first gate drive signal for a first switch is high and when a second carrier signal is greater than the second voltage level, a second gate drive signal for a second switch is high, thereby driving an inverter to output a multi-level voltage having a first output level based on the first drive signal and a second output level based on the second drive signal.

Claims (33)

1 . A controller for a wireless power system, wherein the system comprises an inverter configured to output an output current and the controller is configured to generate gate drive signals for driving respective switches of the inverter, the controller comprising:

a control module configured to generate a first control signal having a first voltage level and a second control signal having a second voltage level; and

a modulator configured to (a) receive a signal representative of the output current of the inverter and (b) generate carrier signals based on the output current of the inverter, wherein the carrier signals comprise a first carrier signal and a second carrier signal such that:

(i) when the first carrier signal is greater than the first voltage level, a first gate drive signal for a first switch is high, and

(ii) when the second carrier signal is greater than the second voltage level, a second gate drive signal for a second switch is high,

thereby driving the inverter to output a multi-level voltage having a first output level based on the first gate drive signal and a second output level based on the second gate drive signal.

2 . The controller of claim 1 , wherein the multi-level voltage has an asymmetrical waveform.

3 . The controller of claim 1 , wherein the carrier signals are configured, at least in part, to maintain zero voltage switching by the switches of the inverter.

4 . The controller of claim 1 , wherein a voltage value of the second output level is approximately equal to a value of the second voltage level.

5 . The controller of claim 1 , wherein a voltage value of the first output level is approximately half of a value of the second voltage level.

6 . The controller of claim 1 , wherein the first gate drive signal is high for a first duration in which the first carrier signal is greater than the first voltage level and the second gate drive signal is high for a second duration in which the second carrier signal is greater than the second voltage signal.

7 . The controller of claim 1 , wherein the first voltage level is based on a value of the second voltage level.

8 . The controller of claim 1 , wherein at least one of the first carrier signal and the second carrier signal has sawtooth modulation.

9 . The controller of claim 1 , wherein at least one of the first carrier signal and the second carrier signal has triangular modulation.

10 . The controller of claim 1 , wherein the modulator is configured to receive and generate analog signals.

11 . The controller of claim 1 , wherein the modulator is configured to receive and generate digital signals.

12 . A method for controlling a wireless power system, wherein the system comprises an inverter configured to output an output current and a controller configured to generate gate drive signals for driving respective switches of the inverter, the method comprising:

generating, via the controller, a first control signal having a first voltage level and a second control signal having a second voltage level;

receiving, at the controller, a signal representative of the output current of the inverter; and

generating, via the controller, carrier signals based on the output current of the inverter, wherein the carrier signals comprise a first carrier signal and a second carrier signal such that:

(i) when the first carrier signal is greater than the first voltage level, a first gate drive signal for a first switch is high, and

(ii) when the second carrier signal is greater than the second voltage level, a second gate drive signal for a second switch is high,

thereby driving the inverter to output a multi-level voltage having a first output level based on the first gate drive signal and a second output level based on the second gate drive signal.

13 . The method of claim 12 , wherein the multi-level voltage has an asymmetrical waveform.

14 . The method of claim 12 , wherein generating the carrier signals based on the output current includes generating carrier signals that are configured, at least in part, to maintain zero voltage switching by the switches of the inverter.

15 . The method of claim 12 , wherein a voltage value of the second output level is approximately equal to a value of the second voltage level.

16 . The method of claim 12 , wherein a voltage value of the first output level is approximately half of a value of the second voltage level.

17 . The method of claim 12 , wherein the first gate drive signal is high for a first duration in which the first carrier signal is greater than the first voltage level and the second gate drive signal is high for a second duration in which the second carrier signal is greater than the second voltage signal.

18 . The method of claim 12 , wherein the first voltage level is based on a value of the second voltage level.

19 . The method of claim 12 , wherein at least one of the first carrier signal and the second carrier signal has sawtooth modulation.

20 . The method of claim 12 , wherein at least one of the first carrier signal and the second carrier signal has triangular modulation.

21 . The method of claim 12 , wherein the controller is configured to receive and generate analog signals.

22 . The method of claim 12 , wherein the controller is configured to receive and generate digital signals.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2025
From: WITRICITY CORPORATION
To: WITRICITY AI TECH, LLC
Reel/Frame 073982/0106 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2024
From: DANILOVIC, MILISAV; ATASOY, OGUZ; LE, NAM HOAI; GELLIS, DAVID
To: WITRICITY CORPORATION
Reel/Frame 066015/0387 →
Continuity (2)
Provisional Application 63379537 · Oct 14, 2022
Related Publication 20240136945A1 · Apr 25, 2024
References Cited (23)
US 10680457B2 · Weidner et al. · 2020 [cited by applicant]
US 11356015B2 · Lukic · 2022 [cited by examiner]
US 20070222542A1 · Joannopoulos et al. · 2007 [cited by applicant]
US 20080278264A1 · Karalis et al. · 2008 [cited by applicant]
US 20110193416A1 · Campanella et al. · 2011 [cited by applicant]
US 20140035704A1 · Efe et al. · 2014 [cited by applicant]
US 20140241507A1 · Woywode et al. · 2014 [cited by applicant]
US 20140361636A1 · Endo et al. · 2014 [cited by applicant]
US 20150051750A1 · Kurs et al. · 2015 [cited by applicant]
US 20160248275A1 · Okidan · 2016 [cited by applicant]
US 20170117751A1 · Karnstedt et al. · 2017 [cited by applicant]
US 20170324351A1 · Rochford · 2017 [cited by applicant]
US 20210257866A1 · Lee · 2021 [cited by examiner]
WO WO2022097051A1 · 2022 [cited by applicant]
PCT/US2023/076883—International Search Report and Written Opinion, May 13, 2024, 18 pages. [cited by applicant]
Mauerer, et al., “Low Jitter GaN E HEMT Gate Driver With High Common Mode Voltage Transient Immunity”, IEEE Transactions on Industrial Electronics, Nov. 2017, vol. 64, No. 11: pp. 9043-9051, doi: 10.1109/TIE.2017.267735… [cited by applicant]
Huber, et al., “Common mode currents in multi cell Solid State Transformers”, 2014 International Power Electronics Conference (IPEC Hiroshima 2014 ECCE Asia), 2014: pp. 766-773, doi: 10.1109/IPEC.2014.6869674. [cited by applicant]
Kulanayagam, et al., “Reduction of heat sink common mode currents in switching mode power supply circuits”, Advances in Radio Science, 2011, vol. 9: pp. 317-321, doi:10.5194/ars-9-317-2011. [cited by applicant]
Christensen, et al., “Common mode current mitigation for medium voltage half bridge SiC modules,” 2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe), 2017: pp. P.1-P.8, doi: 10.2391… [cited by applicant]
Yuan, et al., “Self-balancing of the clamping capacitor voltages in the multilevel capacitor clamping inverter under sub harmonic PWM modulation”, IEEE Transactions on Power Electronics, Mar. 2001, vol. 16, No. 2: pp. 2… [cited by applicant]
Barth et al., “Design and control of a GaN-based, 13-level, flying capacitor multilevel inverter”, 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), 2016: pp. 1-6, doi: 10.1109/COMPEL.2016.… [cited by applicant]
Higa, et al., “Development of Flying Capacitor Dual Active Bridge Converter using Multi-mode Operation depending on Output Power,” IEEJ Transactions on Industry Applications, Oct. 2017, vol. 137, No. 10: pp. 760-768, do… [cited by applicant]
Kusaka, et al., “Power Decoupling Circuit with Flying Capacitor DC-DC Converter”, 2020 22nd European Conference on Power Electronics and Applications (EPE'20 ECCE Europe), Lyon, France, 2020: pp. 1-10, doi: 10.23919/EPE… [cited by applicant]