IP Library › Granted Patent US 12,531,010
Granted Patent B2
US 12,531,010 · App. 18/505,137 · Granted Jan 20, 2026

Pixel and display device including the same

Inventor: Keunwoo Kim (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/32G09G2300/0426G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/08G09G2320/02G09G2320/045
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Quick Facts
Patent No.
US 12,531,010
App. No.
18/505,137
Granted
Jan 20, 2026
Kind
B2
Abstract

A pixel is disclosed that includes a first transistor, a second transistor, a third transistor, a light emitting diode, a first capacitor, and a second capacitor. The first transistor includes a first gate electrode connected to a first node, a second gate electrode which receives a write gate signal or an emission control signal, a first electrode which receives a first power voltage, and a second electrode connected to a second node.

Claims (39)

1 . A pixel, comprising:

a first transistor which includes a first gate electrode connected to a first node, a second gate electrode which receives a write gate signal, a first electrode which receives a first power voltage, and a second electrode connected to a second node;

a second transistor which includes a gate electrode which receives the write gate signal, a first electrode connected to the first node, and a second electrode connected to a third node;

a third transistor which includes a gate electrode which receives a compensation gate signal, a first electrode connected to the third node, and a second electrode connected to the second node;

a light emitting diode which includes a first electrode connected to the second node and a second electrode which receives a second power voltage;

a first capacitor which includes a first electrode connected to the third node and a second electrode which receives a data voltage; and

a second capacitor which includes a first electrode connected to the first node and a second electrode which receives a third power voltage,

wherein a frame period includes:

an initialization period in which the first gate electrode of the first transistor and the first electrode of the light emitting diode are initialized;

a compensation period in which a threshold voltage of the first transistor is compensated;

a programming period in which the data voltage is written to the first gate electrode of the first transistor; and

an emission period in which the light emitting diode emits a light, and

wherein the write gate signal transitions from a turn-off voltage level to a turn-on voltage level in the initialization period, has the turn-on voltage level in the compensation period and the emission period, and has an intermediate voltage level between the turn-off voltage level and the turn-on voltage level in the programming period.

2 . The pixel of claim 1 , wherein the first power voltage has a low voltage level in the initialization period, and has a high voltage level in the compensation period and the emission period.

3 . The pixel of claim 1 , wherein the second power voltage has a high voltage level in the initialization period and the compensation period, and has a low voltage level in the emission period.

4 . The pixel of claim 1 , wherein the third power voltage has a low voltage level in the initialization period, and has a high voltage level in the compensation period, the programming period, and the emission period.

5 . The pixel of claim 1 , wherein the compensation gate signal has a turn-on voltage level in the initialization period and the compensation period, and has a turn-off voltage level in the programming period and the emission period.

6 . A display device, comprising:

a display panel which includes a plurality of pixels; and

a panel driver which drives the display panel,

wherein each of the plurality of pixels includes:

a first transistor which includes a first gate electrode connected to a first node, a second gate electrode which receives a write gate signal or an emission control signal, a first electrode which receives a first power voltage, and a second electrode connected to a second node;

a second transistor which includes a gate electrode which receives the write gate signal, a first electrode connected to the first node, and a second electrode connected to a third node;

a third transistor which includes a gate electrode which receives a compensation gate signal, a first electrode connected to the third node, and a second electrode connected to the second node;

a light emitting diode which includes a first electrode connected to the second node and a second electrode which receives a second power voltage;

a first capacitor which includes a first electrode connected to the third node and a second electrode which receives a data voltage; and

a second capacitor which includes a first electrode connected to the first node and a second electrode which receives a third power voltage,

wherein a frame period of each of the plurality of pixels includes:

an initialization period in which the first gate electrode of the first transistor and the first electrode of the light emitting diode are initialized;

a compensation period in which a threshold voltage of the first transistor is compensated;

a programming period in which the data voltage is written to the first gate electrode of the first transistor; and

an emission period in which the light emitting diode emits a light, and

wherein the second gate electrode of the first transistor receives the write gate signal, and

wherein the write gate signal transitions from a turn-off voltage level to a turn-on voltage level in the initialization period, has the turn-on voltage level in the compensation period and the emission period, and has an intermediate voltage level between the turn-off voltage level and the turn-on voltage level in the programming period.

7 . The display device of claim 6 , wherein the programming period and the emission period are sequentially performed on a row-by-row basis in the plurality of pixels.

8 . The display device of claim 6 , wherein the initialization period and the compensation period are simultaneously performed in the plurality of pixels.

9 . The display device of claim 6 , wherein the second gate electrode of the first transistor receives the emission control signal, and

wherein the write gate signal transitions from a turn-off voltage level to a turn-on voltage level in the initialization period, has the turn-on voltage level in the compensation period and the programming period, and has the turn-off voltage level in the emission period.

10 . The display device of claim 9 , wherein the emission control signal transitions from a turn-off voltage level to a turn-on voltage level in the initialization period, has the turn-off voltage level in the programming period, and has the turn-on voltage level in the emission period.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2023
From: KIM, KEUNWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065503/0933 →
Priority Claims (1)
KR 10-2023-0029972 · Mar 7, 2023 · national
Continuity (1)
Related Publication 20240304134A1 · Sep 12, 2024
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