IP Library › Granted Patent US 12,532,665
Granted Patent B2
US 12,532,665 · App. 18/484,202 · Granted Jan 20, 2026

Method of fabricating a magnetoresistive bit from a magnetoresistive stack

Inventors: Kerry Joseph Nagel (Scottsdale, AZ); Sanjeev Aggarwal (Scottsdale, AZ); Sarin A. Deshpande (San Jose, CA)
Assignee: Everspin Technologies, Inc.
H10N50/01G11C11/161H10N50/10H10N50/80H10N50/85
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Quick Facts
Patent No.
US 12,532,665
App. No.
18/484,202
Granted
Jan 20, 2026
Kind
B2
Abstract

A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.

Claims (30)

1 . A method of fabricating a magnetoresistive bit from a magnetoresistive stack including at least two magnetic regions, an interfacing region, at least two intermediate regions, an electrically conductive region, and a hardmask region, the method comprising:

(a) etching through at least a portion of the hardmask region to expose the interfacing region, wherein the hardmask region is disposed over the interfacing region;

(b) after the etching in step (a), etching through the interfacing region, a first intermediate region of the at least two intermediate regions, and a first magnetic region of the at least two magnetic regions to expose a first set of areas in a first direction, wherein the interfacing region is disposed over the first intermediate region and the first intermediate region is disposed over the first magnetic region;

(c) after the etching in step (b), etching through the interfacing region, the first intermediate region, and the first magnetic region to expose a second set of areas in a second direction;

(d) after the etching in step (c), etching through a second intermediate region of the at least two intermediate regions, a second magnetic region of the at least two magnetic regions, and the electrically conductive region to expose a third set of areas in the first direction, wherein the second intermediate region is disposed over the second magnetic region and the second magnetic region is disposed over the electrically conductive region; and

(e) after the etching in step (d), etching through the second intermediate region, the second magnetic region, and the electrically conductive region to expose a fourth set of areas in the second direction.

2 . The method of claim 1 , wherein the first direction is transverse to the second direction.

3 . The method of claim 1 , wherein the first set of areas is spaced substantially equidistant from each other and the second set of areas is spaced substantially equidistant from each other.

4 . The method of claim 1 , wherein the first set of areas is spaced substantially equidistant from each other and the third set of areas is spaced substantially equidistant from each other.

5 . The method of claim 1 , after the etching in steps (b)-(e), the magnetoresistive bit forms an array of substantially square or substantially rectangular shapes.

6 . The method of claim 1 , wherein the hardmask region includes a thickness in a range of approximately 600-1200 Å.

7 . The method of claim 1 , the hardmask region including a first layer, a second layer, and a third layer, wherein the first layer is disposed over the second layer and the first layer has a higher etch rate than the second layer.

8 . The method of claim 7 , wherein the first layer having a higher etch rate to a chemical reagent is disposed over the second layer having a lower etch rate to the chemical reagent.

9 . The method of claim 8 , wherein etching through the first layer of the hardmask region uses a chemical etching or a partially chemical etching, and wherein etching through at least the second layer of the hardmask region uses a physical etching.

10 . The method of claim 8 , wherein the third layer is disposed below the second layer, and wherein the first layer and the third layer have a higher etch rate to the chemical reagent than the second layer.

11 . The method of claim 1 , wherein the first direction is perpendicular to the second direction.

12 . A method of fabricating a magnetoresistive bit from a magnetoresistive stack including a first magnetoresistive stack layer, a second magnetoresistive stack layer, and a multi-layered surface region, the method comprising:

(a) etching through at least a portion of the multi-layered surface region to expose a mating region of the first magnetoresistive stack layer;

(b) after the etching in step (a), etching through the first magnetoresistive stack layer to expose a first set of multiple parallel strips extending along a first direction, wherein the first magnetoresistive stack layer including the mating region adjacent to the multi-layered surface region, a free magnetic region, and a first intermediate region disposed between the mating region and the free magnetic region;

(c) after the etching in step (b), etching through the first magnetoresistive stack layer to expose a second set of parallel strips extending along a second direction;

(d) after the etching in step (c), etching through the second magnetoresistive stack layer to expose a third set of multiple parallel strips extending along the first direction, wherein the second magnetoresistive stack layer includes a second intermediate region, a fixed magnetic region disposed below the second intermediate region, and an electrically conductive region disposed below both the second intermediate region and the fixed magnetic region; and

(e) after the etching in step (d), etching through the second magnetoresistive stack layer to expose a fourth set of parallel strips extending along the second direction.

13 . The method of claim 12 , wherein the multi-layered surface region includes a first layer disposed over a second layer, the first layer having a higher etch rate than the second layer to a same chemical reagent.

14 . The method of claim 12 , wherein the etching in step (a) includes etching through a first layer using an etching process utilizing a chemical reagent and etching through a second layer using a physical etching process.

15 . The method of claim 12 , wherein the first direction is perpendicular to the second direction.

16 . The method of claim 13 , wherein the multi-layered surface region further includes a third layer disposed below the second layer, and wherein the first layer and the third layer have a higher etch rate than the second layer to the same chemical reagent.

17 . The method of claim 12 , wherein, after the etching in steps (b)-(e), the magnetoresistive bit forms an array of substantially square or substantially rectangular shapes.

18 . The method of claim 12 , wherein, after the etching in step (a), the first magnetoresistive stack layer and the second magnetoresistive stack layer are etched using a mask comprising a remaining portion of the multi-layered surface region.

19 . The method of claim 12 , wherein the multi-layered surface region includes a thickness in a range of approximately 600-1200 Å.

20 . The method of claim 12 , wherein the first direction is perpendicular to the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2023
From: NAGEL, KERRY JOSEPH; AGGARWAL, SANJEEV; DESHPANDE, SARIN A.
To: EVERSPIN TECHNOLOGIES, INC.
Reel/Frame 065280/0630 →
Continuity (5)
Continuation 17109318 · Dec 2, 2020
Continuation 16881151 · May 22, 2020
Continuation 16108762 · Aug 22, 2018
Provisional Application 62551400 · Aug 29, 2017
Related Publication 20240049607A1 · Feb 8, 2024
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