IP Library Granted Patent US 12,532,734
Granted Patent B2
US 12,532,734 · App. 18/179,377 · Granted Jan 20, 2026

Semiconductor device and method of fabricating the same

Inventors: Ching-Pin Hsu (Tainan, TW); Shih Hung Yang (Tainan, TW); Chu Chun Chang (Kaohsiung, TW); Kuo-Yuh Yang (Hsinchu County, TW); Chia-Huei Lin (Hsinchu, TW)
Assignee: United Microelectronics Corp.
H01L21/7682H01L21/76832H01L21/76834H01L21/76877H01L23/5222H01L23/5283H10D62/115
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Quick Facts
Patent No.
US 12,532,734
App. No.
18/179,377
Granted
Jan 20, 2026
Kind
B2
Abstract

A semiconductor device includes a conductive structure, a first dielectric layer, a second dielectric layer and a liner layer. The conductive structure is located on a substrate. The first dielectric layer covers the conductive structure and the substrate. The second dielectric layer is located on the first dielectric layer. An air gap is present in the first dielectric layer and the second dielectric layer, and is located above the conductive structure. The liner layer covers and surrounds a middle portion of the air gap.

Claims (18)

1 . A semiconductor device, comprising:

a conductive structure, disposed on a substrate;

a first dielectric layer, covering the conductive structure and the substrate;

a second dielectric layer, disposed on the first dielectric layer, wherein an air gap is present in the first dielectric layer and the second dielectric layer, and is located above the conductive structure; and

a liner layer covering and surrounding a middle portion of the air gap,

wherein the first dielectric layer comprises a lower part, a middle part and an upper part, and the air gap is present in the upper part and the middle part of the first dielectric layer and in the second dielectric layer, and

wherein a top surface of the lower part of the first dielectric layer is coplanar with a top surface of the conductive structure.

2 . The semiconductor device according to claim 1 , wherein the liner layer comprises silicon oxide.

3 . The semiconductor device according to claim 1 , wherein the conductive structure comprises a gate structure.

4 . The semiconductor device according to claim 1 , further comprising:

a first stop layer, disposed between the substrate and the lower part of the first dielectric layer;

a second stop layer, disposed between the lower part and the middle part of the first dielectric layer;

a third stop layer, disposed between the middle part and the upper part of the first dielectric layer; and

a fourth stop layer, disposed between the upper part of the first dielectric layer and the second dielectric layer.

5 . The semiconductor device according to claim 1 , wherein the lower part and the middle part of the first dielectric layer comprise undoped glass, and the upper part of the first dielectric layer and the second dielectric layer comprise a low dielectric constant material.

6 . The semiconductor device according to claim 1 , wherein a maximum width of the air gap in the middle part of the dielectric layer is greater than a width of the conductive structure.

7 . The semiconductor device according to claim 1 , wherein a maximum width in a lower portion of the air gap is greater than a width of the conductive structure.

8 . The semiconductor device according to claim 1 , wherein the second dielectric layer covers a top of the air gap, and extends to cover a sidewall and a bottom of the air gap.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2023
From: HSU, CHING-PIN; YANG, SHIH HUNG; CHANG, CHU CHUN; YANG, KUO-YUH; LIN, CHIA-HUEI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 062967/0083 →
Priority Claims (1)
CN 202211611444.X · Dec 14, 2022 · national
Continuity (1)
Related Publication 20240203785A1 · Jun 20, 2024
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