IP Library › Granted Patent US 12,547,227
Granted Patent B2
US 12,547,227 · App. 18/618,185 · Granted Feb 10, 2026

Information processing apparatus and control method

Inventors: Atsunobu Nakamura (Kanagawa, JP); Hiroki Oda (Kanagawa, JP); Kengo Sano (Kanagawa, JP); Ryohta Nomura (Kanagawa, JP)
Assignee: Lenovo (Singapore) Pte. Ltd.
G06F1/26G06F1/3203
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Quick Facts
Patent No.
US 12,547,227
App. No.
18/618,185
Granted
Feb 10, 2026
Kind
B2
Abstract

An information processing apparatus includes a first processor, a second processor, an execution management unit configured to select a processor corresponding to a program whose execution is instructed, based on setting information indicating an execution processor for each program, and a power control unit configured to control an operation state based on power consumption of the first processor and the second processor, according to a power control mode selected from a plurality of levels of power control modes that differ in rated power. The power control unit is configured to stop access to the second processor, when changing the power control mode from a high power control mode whose rated power is higher than or equal to a predetermined rated power to a low power control mode whose rated power is lower than the predetermined rated power.

Claims (24)

1 . An information processing apparatus comprising:

a first processor;

a second processor;

an execution management unit configured to select a processor corresponding to a program whose execution is instructed, based on setting information indicating an execution processor for each program; and

a power control unit configured to:

control an operation state based on power consumption of the first processor and the second processor, according to a power control mode selected from a plurality of levels of power control modes that differ in rated power,

stop access to the second processor, when changing the power control mode from a high power control mode whose rated power is higher than or equal to a predetermined rated power to a low power control mode whose rated power is lower than the predetermined rated power, and

when instructed to change from the high power control mode to the low power control mode during execution of processing of a program using the second processor, output guidance information indicating:

at least one of suspending the change to the low power control mode and resuming the processing of the program using the first processor, and

ending the processing of the program.

2 . The information processing apparatus according to claim 1 , wherein the power control unit is configured to, when instructed to suspend the change to the low power control mode, wait without stopping the access to the second processor until the processing of the program using the second processor ends.

3 . The information processing apparatus according to claim 2 , wherein the power control unit is configured to set setting information indicating the second processor as an execution processor for the program.

4 . The information processing apparatus according to claim 3 , wherein the power control unit is configured to set setting information indicating the first processor as an execution processor for the program.

5 . The information processing apparatus according to claim 1 , wherein the power control unit is configured to, when instructed to resume the processing of the program using the first processor, stop the processing of the program using the second processor and thereafter resume the processing of the program using the first processor.

6 . The information processing apparatus according to claim 1 , wherein

the first processor is an integrated graphics processing unit integrated with a central processing unit, and

the second processor is an independent graphics processing unit.

7 . A control method for an information processing apparatus including a first processor and a second processor, comprising:

selecting a processor corresponding to a program whose execution is instructed, based on setting information indicating an execution processor for each program;

controlling an operation state based on power consumption of the first processor and the second processor, according to a power control mode selected from a plurality of levels of power control modes that differ in rated power;

stopping access to the second processor, when changing the power control mode from a high power control mode whose rated power is higher than or equal to a predetermined rated power to a low power control mode whose rated power is lower than the predetermined rated power;

when instructed to change from the high power control mode to the low power control mode during execution of processing of a program using the second processor, outputting guidance information indicating:

at least one of suspending the change to the low power control mode and resuming the processing of the program using the first processor, and

ending the processing of the program.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2024
From: NAKAMURA, ATSUNOBU; ODA, HIROKI; SANO, KENGO; NOMURA, RYOHTA
To: LENOVO (SINGAPORE) PTE. LTD.
Reel/Frame 067132/0315 →
Priority Claims (1)
JP 2023-083955 · May 22, 2023 · national
Continuity (1)
Related Publication 20240393849A1 · Nov 28, 2024
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