IP Library › Granted Patent US 12,550,400
Granted Patent B2
US 12,550,400 · App. 18/177,478 · Granted Feb 10, 2026

Manufacturing method of semiconductor device

Inventor: Kouichi Konishi (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H10D64/01H01L21/02071H01L21/3065H01L21/31116H01L21/32135H01L21/76805H10D12/038H01L21/76843H01L21/76883
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Quick Facts
Patent No.
US 12,550,400
App. No.
18/177,478
Granted
Feb 10, 2026
Kind
B2
Abstract

Increasing in a contact-resistance between a trench gate lead-out electrode and a gate lead-out contact member is suppressed. It is assumed that a natural oxidation film is formed in the polysilicon film when the trench gate lead-out electrode is formed. In case of the natural oxidation film is formed, a desired etching process is performed so that the natural oxidation film does not protrude beyond the upper surface of the trench gate lead-out electrode.

Claims (40)

1 . A manufacturing method of a semiconductor device, the manufacturing method comprising the steps of:

(a) forming a first trench having a first width and a second trench having a second width greater than the first width on a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface;

(b) forming a first trench electrode and a second trench electrode by sequentially laminating a first conductive film and a second conductive film to fill the first trench and the second trench, respectively;

(c) forming an interlayer insulating film on the first main surface;

(d) forming a first contact opening penetrating through the interlayer insulating film and exposing an upper surface of the first trench electrode and the first main surface, and forming a second contact opening penetrating through the interlayer insulating film and exposing an upper surface of the second trench electrode;

(e) etching the upper surface of the first trench electrode and the first main surface exposed from the first contact opening, and the upper surface of the second trench electrode exposed from the second contact opening, respectively; and

(f) filling a contact member in the first contact opening and the second contact opening, wherein

the step of (e) includes:

(e1) retreating the upper surface of the first trench electrode and the first main surface exposed from the first contact opening, and the upper surface of the second trench electrode exposed from the second contact opening, in a thickness direction of the semiconductor substrate respectively; and

(e2) after the step of (e1), removing residue left inside the first contact opening and the second contact opening.

2 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (e2), the method of the removing residue includes an isotropic dry etching using gases containing CF4 gas.

3 . The manufacturing method of the semiconductor device according to claim 2 , wherein in the step of (e1), the method of an anisotropic dry etching is performed.

4 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (b), a natural oxidation film is formed between the first conductive film and the second conductive film; and

in the step of (e2), the residue left inside the first contact opening and the second contact opening is a part of the natural oxidation film.

5 . The manufacturing method of the semiconductor device according to claim 1 , wherein the first contact opening is formed so as to straddle between the first trench electrode and the first main surface, in plan view.

6 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (a), the semiconductor substrate has a first conductivity type, and

the manufacturing method further comprises the steps of (f) before the step of (c), forming a first impurity region of a second conductivity type opposite to the first conductivity type in a first region on the first main surface and contacting with the first trench, and

in the step of (d), the first main surface includes the first impurity region.

7 . The manufacturing method of the semiconductor device according to claim 1 , further comprising the steps of:

(b1) in the step of (b), performing an etch-back process between the sequential lamination of the first conductive film and the second conductive film.

8 . The manufacturing method of the semiconductor device according to claim 1 , wherein the first conductive film and the second conductive film are polysilicon films.

9 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (b), the first trench electrode is filled in the first trench via a trench insulating film, and

in the step of (e1), retreating an upper surface of the trench insulating film exposed from the first contact opening.

10 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (d), the first contact opening and the second contact opening are formed simultaneously.

11 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (a), a third trench having the first width is formed so as to contact with the first main surface and be separated apart from the first trench via the first main surface, and

in the step of (b), a third trench electrode is formed by sequentially laminating the first conductive film and the second conductive film to fill the third trench.

12 . The manufacturing method of the semiconductor device according to claim 1 , wherein

in the step of (a), a fourth trench having the first width is formed so as to contact with the first main surface and be separated apart from the first trench via the first main surface, and a fifth trench and a sixth trench are formed so as to be separated apart from each other,

in the step of (b), a fourth trench electrode, a fifth trench electrode and a sixth trench electrode are formed by sequentially laminating the first conductive film and the second conductive film to fill the fourth trench, the fifth trench, and the sixth trench, respectively,

in the step of (d), a third contact opening is formed to penetrate through the interlayer insulating film and exposing the first main surface between the fifth trench electrode and the sixth trench electrode,

in the step of (f), the contact member is filled in the third contact opening, and

in the step of (e1), the first main surface exposed from the third contact opening is retreated.

13 . The manufacturing method of the semiconductor device according to claim 12 , wherein

in the step of (d), the first contact opening, the second contact opening, and the third contact opening are formed simultaneously.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2023
From: KONISHI, KOUICHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 062865/0085 →
Priority Claims (1)
JP 2022-080809 · May 17, 2022 · national
Continuity (1)
Related Publication 20230378281A1 · Nov 23, 2023
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