Stack type semiconductor device
A stack-type semiconductor device includes: a first nanosheet stack structure arranged on a substrate; a first source/drain region extending on a side surface of the first nanosheet stack structure; a second nanosheet stack structure stacked on the first nanosheet stack structure; a second source/drain region extending on a side surface of the second nanosheet stack structure; a contact hole adjacent to a side surface of the second source/drain region and a side surface of the first source/drain region and extending in a vertical direction with respect to a surface of the substrate; and a contact electrode disposed in the contact hole, wherein the contact electrode contacts the side surface of the first source/drain region.
1 . A stack-type semiconductor device comprising:
a first nanosheet stack structure arranged on a substrate;
a first source/drain region extending on a side surface of the first nanosheet stack structure;
a second nanosheet stack structure stacked on the first nanosheet stack structure;
a second source/drain region extending on a side surface of the second nanosheet stack structure;
a contact hole adjacent to a side surface of the second source/drain region and a side surface of the first source/drain region and extending in a vertical direction with respect to a surface of the substrate; and
a contact electrode disposed in the contact hole, wherein the contact electrode contacts the side surface of the first source/drain region,
wherein the contact electrode comprises a ball-type contact electrode that is spaced apart from the side surface of the second source/drain region.
2 . The stack-type semiconductor device of claim 1 , wherein the first nanosheet stack structure comprises a plurality of first nanosheets, a plurality of first gate insulating layers, and a plurality of first gate electrodes, wherein each of the plurality of first nanosheets has a first length in a horizontal direction with respect to the surface of the substrate, wherein the plurality of first gate insulating layers and the plurality of first gate electrodes are arranged between the plurality of first nanosheets in the vertical direction,
wherein the second nanosheet stack structure comprises a plurality of second nanosheets, a plurality of second gate insulating layers, and a plurality of second gate electrodes, wherein each of the plurality of second nanosheets has a second length that is less than the first length in the horizontal direction, and wherein the plurality of second gate insulating layers and the plurality of second gate electrodes are arranged between the plurality of second nanosheets.
3 . The stack-type semiconductor device of claim 1 , wherein lateral profiles of the first and second source/drain regions are bent in the vertical direction.
4 . The stack-type semiconductor device of claim 1 , wherein an etch stop layer is disposed between the first nanosheet stack structure and the second nanosheet stack structure.
5 . The stack-type semiconductor device of claim 1 , wherein the ball-type contact electrode is spaced apart from the side surface of the second source/drain region in a horizontal direction with respect to the surface of the substrate, and wherein a ball-type insulating layer is arranged between the second source/drain region and the ball-type contact electrode.
6 . The stack-type semiconductor device of claim 1 , wherein the contact hole comprises a ball-type contact hole on the side of the second source/drain region,
wherein a ball-type insulating layer is disposed on an inner wall of the ball-type contact hole, and
wherein the contact electrode comprises a ball-type contact electrode disposed in the ball-type contact hole and on the ball-type insulating layer.
7 . The stack-type semiconductor device of claim 6 , wherein the ball-type contact electrode is arranged on an upper portion of the first source/drain region.
8 . The stack-type semiconductor device of claim 1 , wherein the contact hole comprises a vertical contact hole on the side surface of the first source/drain region, and
the contact electrode comprises a vertical contact electrode disposed in the vertical contact hole.
9 . The stack-type semiconductor device of claim 1 ,
wherein an intermediate electrode is disposed on the side surface of the first source/drain region, and
wherein the contact electrode contacts the first source/drain region through the intermediate electrode.
10 . The stack-type semiconductor device of claim 9 , wherein the contact hole comprises a ball-type contact hole on a side surface of the intermediate electrode, and
wherein the ball-type contact electrode is disposed in the ball-type contact hole.
11 . The stack-type semiconductor device of claim 9 , wherein the contact hole comprises a vertical contact hole spaced apart from the second source/drain region, and
wherein the contact electrode is disposed in the vertical contact hole.
12 . A stack-type semiconductor device comprising:
a first nanosheet stack structure arranged on a substrate;
a first source/drain region disposed on a side surface of the first nanosheet stack structure;
a second nanosheet stack structure stacked on the first nanosheet stack structure;
a second source/drain region disposed on a side surface of the second nanosheet stack structure;
a contact hole contacting a first side surface of the second source/drain region and a first side surface of the first source/drain region, and extending in a vertical direction with respect to a surface of the substrate; and
a contact electrode disposed in the contact hole, wherein the contact electrode directly contacts the first side surface of the first source/drain region,
wherein the contact electrode comprises a ball-type contact electrode that is spaced apart from the first side surface of the second source/drain region.
13 . The stack-type semiconductor device of claim 12 , wherein the contact electrode is spaced apart from the first side surface of the second source/drain region in a horizontal direction with respect to the surface of the substrate, and wherein a ball-type insulating layer is arranged between the second source/drain region and the contact electrode.