IP Library Granted Patent US 12,557,366
Granted Patent B2
US 12,557,366 · App. 17/915,211 · Granted Feb 17, 2026

Semiconductor device and method for manufacturing semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Yoshihiro Komatsu (Kanagawa, JP); Shota Mizukami (Hokkai, JP); Shinobu Kawaguchi (Kanagawa, JP); Hiromi Sawai (Kanagawa, JP); Yasumasa Yamane (Kanagawa, JP); Yuji Egi (Kanagawa, JP); Yujiro Sakurada (Kanagawa, JP); Shinya Sasagawa (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10D64/514H01L21/02164H01L21/0217H01L21/02178H01L21/02181H01L21/0228H01L21/02631H10D64/258H10D64/691H10D64/693
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Quick Facts
Patent No.
US 12,557,366
App. No.
17/915,211
Granted
Feb 17, 2026
Kind
B2
Abstract

A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.

Claims (31)

1 . A semiconductor device, comprising:

an oxide semiconductor film;

a source electrode and a drain electrode over the oxide semiconductor film;

an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode;

a first gate insulating film over the oxide semiconductor film;

a second gate insulating film over the first gate insulating film;

a gate electrode over the second gate insulating film;

a third gate insulating film placed between the second gate insulating film and the gate electrode; and

a fourth gate insulating film placed between the second gate insulating film and the third gate insulating film;

wherein in the interlayer insulating film, an opening is formed to overlap with a region between the source electrode and the drain electrode,

wherein the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film,

wherein the first gate insulating film comprises oxygen and aluminum,

wherein the first gate insulating film includes a region that is thinner than the second gate insulating film, and

wherein the fourth gate insulating film comprises oxygen and hafnium.

2 . The semiconductor device according to claim 1 ,

wherein the first gate insulating film is in contact with a top surface and a side surface of the oxide semiconductor film, and a side surface of the source electrode, a side surface of the drain electrode, and a side surface of the interlayer insulating film.

3 . The semiconductor device according to claim 1 ,

wherein the second gate insulating film comprises oxygen and silicon.

4 . The semiconductor device according to claim 1 ,

wherein the third gate insulating film comprises nitrogen and silicon.

5 . The semiconductor device according to claim 1 ,

wherein a first insulating film is placed over the interlayer insulating film, the first gate insulating film, the second gate insulating film, the third gate insulating film, and the gate electrode,

wherein the first insulating film is in contact with at least parts of top surfaces of the interlayer insulating film, the first gate insulating film, the second gate insulating film, the third gate insulating film, and the gate electrode, and

wherein the first insulating film comprises oxygen and aluminum.

6 . The semiconductor device according to claim 1 ,

wherein the first gate insulating film has a region with a thickness of greater than or equal to 0.5 nm and less than or equal to 3.0 nm.

7 . The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises one or more of In, Ga, and Zn.

8 . The semiconductor device according to claim 5 , further comprising:

a second insulating film placed over the first insulating film; and

a third insulating film placed below the oxide semiconductor film;

wherein the second insulating film is in contact with a top surface and a side surface of the first insulating film a side surface of the interlayer insulating film, and a top surface of the third insulating film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2023
From: YAMAZAKI, SHUNPEI; KOMATSU, YOSHIHIRO; MIZUKAMI, SHOTA; KAWAGUCHI, SHINOBU; SAWAI, HIROMI; YAMANE, YASUMASA; EGI, YUJI; SAKURADA, YUJIRO; SASAGAWA, SHINYA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 062815/0349 →
Priority Claims (2)
JP 2020-063049 · Mar 31, 2020 · national
JP 2020-115292 · Jul 3, 2020 · national
Continuity (1)
Related Publication 20230113593A1 · Apr 13, 2023
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