IP Library Granted Patent US 12,557,489
Granted Patent B2
US 12,557,489 · App. 18/066,475 · Granted Feb 17, 2026

Display panel and manufacturing method thereof

Inventors: Kerong Wu (Changsha, CN); Haoxuan Zheng (Changsha, CN)
Assignees: CHANGSHA HKC OPTOELECTRONICS CO., LTD.; HKC CORPORATION LIMITED
H10K59/126H10K71/00H10D86/481H10D86/60H10K59/1201H10K59/1213H10K59/1216
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Quick Facts
Patent No.
US 12,557,489
App. No.
18/066,475
Granted
Feb 17, 2026
Kind
B2
Abstract

The display panel includes a transparent substrate and a transistor and a storage capacitor formed on the transparent substrate. The transparent substrate has a light-emitting region and a light-transmitting region. The transistor and the storage capacitor are arranged in a thickness direction of the display panel. The transistor and the storage capacitor are formed on the light-emitting region without overlapping with the light-transmitting region.

Claims (36)

1 . A display panel comprising:

a transparent substrate having a light-emitting region and a light-transmitting region; and

a transistor and at least one storage capacitor formed on the transparent substrate,

wherein the transistor and the at least one storage capacitor are arranged in a thickness direction of the display panel,

wherein the transistor and the at least one storage capacitor are formed on the light-emitting region without overlapping with the light-transmitting region;

wherein the display panel further comprises a light-shielding layer formed between the transistor and the transparent substrate and shielding an active layer of the transistor;

wherein the active layer of the transistor is located on a side of a gate of the transistor close to the light-shielding layer and is insulated from the light-shielding layer, wherein either of a source and a drain of the transistor penetrates an insulating layer between the source or the drain and the light-shielding layer and is connected to the light-shielding layer;

wherein the at least one storage capacitor comprises:

a first electrode plate constructed by the light-shielding layer;

a second electrode plate located on a side of the first electrode plate away from the active layer; and

a dielectric layer disposed between the second electrode plate and the first electrode plate.

2 . The display panel according to claim 1 , wherein the second electrode plate protrudes from an upper surface of the transparent substrate.

3 . The display panel according to claim 1 , wherein the second electrode plate is located in the transparent substrate, and an upper surface of the second electrode plate is flush with the upper surface of the transparent substrate; or

the second electrode plate and the dielectric layer are located in the transparent substrate, and an upper surface of the dielectric layer is flush with the upper surface of the transparent substrate; or

the first electrode plate, the second electrode plate, and the dielectric layer are located within the transparent substrate.

4 . The display panel according to claim 1 , wherein an area of the second electrode plate is larger than an area of the first electrode plate.

5 . A manufacturing method of a display panel, comprising:

providing a transparent substrate having a light-emitting region and a light-transmitting region; and

forming a transistor and at least one storage capacitor on the transparent substrate;

wherein the transistor and the at least one storage capacitor are arranged in a thickness direction of the display panel, and

wherein the transistor and the at least one storage capacitor are formed on the light-emitting region without overlapping with the light-transmitting region;

wherein forming the at least one storage capacitor comprises:

forming a second electrode plate, a dielectric layer, and a light-shielding layer in sequence on the transparent substrate;

wherein the light-shielding layer serves as a first electrode plate of the at least one storage capacitor;

wherein the active layer of the transistor is located on a side of a gate of the transistor close to the light-shielding layer and is insulated from the light-shielding layer, wherein either of a source and a drain of the transistor penetrates an insulating layer between the source or the drain and the light-shielding layer and is connected to the light-shielding layer.

6 . The manufacturing method of the display panel according to claim 5 , wherein forming the second electrode plate, the dielectric layer, and the light-shielding layer in sequence on the transparent substrate comprises:

removing a part of the transparent substrate to form a groove in the transparent substrate;

forming the second electrode plate filling the groove, an upper surface of the second electrode plate being flush with an upper surface of the transparent substrate; and

forming the dielectric layer and the light-shielding layer in sequence on the second electrode plate.

7 . The manufacturing method of the display panel according to claim 5 , wherein forming the second electrode plate, the dielectric layer, and the light-shielding layer in sequence on the transparent substrate comprises:

removing a part of the transparent substrate to form a groove in the transparent substrate;

forming the second electrode plate and the dielectric layer in sequence in the groove, an upper surface of the dielectric layer being flush with an upper surface of the transparent substrate; and

forming the light-shielding layer on the dielectric layer.

8 . The manufacturing method of the display panel according to claim 5 , wherein the transistor is formed on the light-shielding layer after forming the at least one storage capacitor.

9 . The manufacturing method of the display panel according to claim 5 , wherein after forming the transistor and the at least one storage capacitor on the transparent substrate, the method further comprises:

forming a light-emitting device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2023
From: WU, KERONG; ZHENG, HAOXUAN
To: CHANGSHA HKC OPTOELECTRONICS CO., LTD.; HKC CORPORATION LIMITED
Reel/Frame 062369/0022 →
Priority Claims (1)
CN 202210102689.3 · Jan 27, 2022 · national
Continuity (1)
Related Publication 20230240102A1 · Jul 27, 2023
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