Systems and methods for estimating lifelong data traffic of a memory device
Devices and techniques for estimating lifelong data traffic of a memory device are described herein. A system includes a processing device and memory configured to store instructions to perform operations comprising: receiving a history of memory accesses to a device under test during execution of an application; identifying a partition size associated with the application; determining an address offset value based on the partition size and the application; and repeatedly applying the memory accesses over a number of iterations, the application of the memory accesses constrained to the partition size, and the memory accesses applied with each iteration beginning at an address based on a multiple of the address offset value to produce an estimation of data traffic.
1 . A system comprising:
a processing device; and
memory configured to store instructions, which when executed by the processing device, cause the processing device to perform operations comprising:
receiving a history of memory accesses to a device under test during execution of an application;
identifying a partition size associated with the application;
determining an address offset value based on the partition size and the application; and
repeatedly applying the memory accesses over a number of iterations, the application of the memory accesses constrained to the partition size, and the memory accesses applied with each iteration beginning at an address based on a multiple of the address offset value to produce an estimation of data traffic.
2 . The system of claim 1 , wherein identifying the partition size comprises:
accessing a trace log; and
determining the partition size based on the trace log.
3 . The system of claim 1 , wherein determining the address offset value comprises:
identifying a pattern of memory accesses within the partition size; and
determining the address offset to effectively move the pattern of memory accesses to fully cover addresses over the partition size.
4 . The system of claim 1 , wherein determining the address offset value comprises:
identifying a lowest address and a highest address in a range of addresses used in the history of memory accesses; and
calculating the address offset value to move the range of addresses to the next address after the highest address.
5 . The system of claim 1 , wherein determining the address offset value comprises:
calculating a size of a memory address range of addresses used in the history of memory accesses; and
calculating the address offset value to have a beginning address offset by the previous beginning address and the size of the memory address range.
6 . The system of claim 1 , wherein determining the address offset value comprises:
calculating a size of a memory address range of addresses used in the history of memory accesses; and
calculating the address offset value based on the size of the memory address range and a size of the total memory address space in the device under test.
7 . The system of claim 6 , wherein the size of the total memory address space is into a plurality of partitions, and wherein the address offset value is based on a size of a partition of one of the plurality of partitions.
8 . The system of claim 1 , wherein the number of iterations is based on an estimated lifetime of the device under test.
9 . The system of claim 1 , wherein the number of iterations is based on a data traffic duration of trace operation.
10 . A method for estimating lifelong data traffic of a device under test comprising:
receiving a history of memory accesses to the device under test during execution of an application;
identifying a partition size associated with the application;
determining an address offset value based on the partition size and the application; and
repeatedly applying the memory accesses over a number of iterations, the application of the memory accesses constrained to the partition size, and the memory accesses applied with each iteration beginning at an address based on a multiple of the address offset value to produce an estimation of data traffic.
11 . The method of claim 10 , wherein identifying the partition size comprises:
accessing a trace log; and
determining the partition size based on the trace log.
12 . The method of claim 10 , wherein determining the address offset value comprises:
identifying a pattern of memory accesses within the partition size; and
determining the address offset to effectively move the pattern of memory accesses to fully cover addresses over the partition size.
13 . The method of claim 10 , wherein determining the address offset value comprises:
identifying a lowest address and a highest address in a range of addresses used in the history of memory accesses; and
calculating the address offset value to move the range of addresses to the next address after the highest address.
14 . The method of claim 10 , wherein determining the address offset value comprises:
calculating a size of a memory address range of addresses used in the history of memory accesses; and
calculating the address offset value to have a beginning address offset by the previous beginning address and the size of the memory address range.
15 . The method of claim 10 , wherein determining the address offset value comprises:
calculating a size of a memory address range of addresses used in the history of memory accesses; and
calculating the address offset value based on the size of the memory address range and a size of the total memory address space in the device under test.
16 . The method of claim 15 , wherein the size of the total memory address space is into a plurality of partitions, and wherein the address offset value is based on a size of a partition of one of the plurality of partitions.
17 . The method of claim 10 , wherein the number of iterations is based on an estimated lifetime of the device under test.
18 . The method of claim 10 , wherein the number of iterations is based on a data traffic duration of trace operation.