Product custody verification using machine-readable code
A system and computerized method verify product custody along a product manufacturing chain. The method may include verifying a first machine-readable (MR) code for a product level N is valid by comparing the first MR code to a database of valid MR codes. Where the first MR code for the product level N is verified as valid, a second, valid MR code is generated for a next product level N+1 in the database of valid MR codes. In addition, the first MR code for the product level N in the database of valid MR codes is invalidated, so it cannot be used again. The second MR code is formed for use with the next product level N+1, e.g., by the downstream product manufacturer. Custody of product levels along a manufacturing chain can be verified and secured, avoiding bad actors from inserting and profiting from fake parts into the manufacturing chain.
1 . A method for verifying product custody along a product manufacturing chain, comprising:
providing an integrated circuit (IC) chip in an IC chip-including product level N, formed at an upstream product manufacturer along the product manufacturing chain, wherein the IC chip includes a first machine-readable (MR) code thereon;
verifying the first MR code for the IC chip-including product level N is valid by comparing the first MR code to a database of valid MR codes;
generating a second, valid MR code for a next, IC chip-including product level N+1 in the database of valid MR codes and invalidating the first MR code for the IC chip-including product level N in the database of valid MR codes in response to verifying the first MR code for the IC chip-including product level N is valid; and
forming an IC chip package, including the IC chip, in the next, IC chip-including product level N+1 at a downstream product manufacturer along the product manufacturing chain, the IC chip package including the second MR code thereon, for use with the next, IC chip-including product level N+1.
2 . The method of claim 1 , further comprising repeating the verifying, the generating and the forming includes forming for more than one next, IC chip-including product level along the product manufacturing chain.
3 . The method of claim 1 , wherein the IC chip in the IC chip-including product level N is one of a plurality of IC chips, and the verifying includes verifying a predetermined plurality of first MR codes for the plurality of IC chips in IC chip-including product level N are valid by comparing each of the predetermined plurality of first MR codes to the database of valid MR codes, and wherein the generating includes generating the second, valid MR code for the next, IC chip-including product level N+1 in the database of valid MR codes and invalidating each of the predetermined plurality of first MR codes for the IC chip-including product level N in the database of valid MR codes in response to verifying each of the predetermined plurality of first MR codes for the plurality of IC chips in IC chip-including product level N are valid.
4 . The method of claim 1 , further comprising generating an invalid product message in response to the first MR code for the IC chip in IC chip-including product level N being invalid.
5 . The method of claim 1 , further comprising preventing access to the database in response to a selected number of failed attempts to verify the first MR code for the IC chip in IC chip-including product level N in the database is valid.
6 . The method of claim 1 , wherein the verifying the first MR code for the IC chip in IC chip-including product level N occurs in response to a request from the downstream product manufacturer.
7 . The method of claim 6 , further comprising allowing the upstream product manufacturer to create valid first MR codes in the database of valid MR codes.
8 . The method of claim 7 , further comprising verifying the request from the downstream product manufacturer is received within a predetermined duration, and wherein the generating the second, valid MR code for the IC chip package in next, IC chip-including product level N+1 in the database of valid MR codes and invalidating the first MR code for the IC chip in IC chip-including product level N in the database of valid MR codes occurs in response to both verifying the first MR code for the IC chip in IC chip-including product level N is valid and verifying the request is received within the predetermined duration.
9 . The method of claim 1 , further comprising allowing the upstream product manufacturer to create valid first MR codes in the database of valid MR codes, and wherein verifying the first MR code for the IC chip in IC chip-including product level N occurs in response to a request from the downstream product manufacturer.
10 . The method of claim 1 , wherein the product manufacturing chain includes at least two of the following product manufacturers: an IC chip fabricator, an IC chip separator, an IC chip module manufacturer, an IC chip packager, an IC chip package end user, a printed circuit board (PCB) manufacturer, and a PCB end user.
11 . The method of claim 1 , wherein the forming the first MR code for use with the IC chip in IC chip-including product level N occurs prior to the verifying.
12 . A method for verifying product custody along a product manufacturing chain, comprising:
providing an integrated circuit (IC) chip in an IC chip-including product level N, formed at an upstream product manufacturer, wherein the IC chip includes a first machine-readable (MR) code thereon;
verifying the first MR code for the IC chip-including product level N is valid by scanning the first MR code and comparing the first MR code to a database of valid MR codes;
generating a second, valid MR code for a next, IC chip-including product level N+1 in the database of valid MR codes and invalidating the first MR code for the IC chip-including product level N in the database of valid MR codes in response to verifying the first MR code for the IC chip-including product level N is valid; and
forming an IC chip package, including the IC chip, in the next, IC chip-including product level N+1 at a downstream product manufacturer, the IC chip package including the second MR code thereon, for use with the next, IC chip-including product level N+1.
13 . The method of claim 12 , further comprising repeating the verifying, the generating, and the forming includes forming for more than one next, IC chip-including product level along the product manufacturing chain.
14 . The method of claim 12 , wherein the IC chip in the IC chip-including product level N is one of a plurality of IC chips, and the verifying includes verifying a predetermined plurality of first MR codes for the plurality of IC chips in IC chip-including product level N are valid by comparing each of the predetermined plurality of first MR codes to the database of valid MR codes, and wherein the generating includes generating the second, valid MR code for the next, IC chip-including product level N+1 in the database of valid MR codes and invalidating each of the predetermined plurality of first MR codes for the IC chip-including product level N in the database of valid MR codes in response to verifying each of the predetermined plurality of first MR codes for the plurality of IC chips in IC chip-including product level N are valid.
15 . The method of claim 12 , further comprising preventing access to the database in response to a selected number of failed attempts to verify the first MR code for the IC chip in IC chip-including product level N in the database is valid.
16 . The method of claim 12 , wherein the verifying the first MR code for the IC chip in IC chip-including product level N occurs in response to a request from the downstream product manufacturer, and further comprising allowing the upstream product manufacturer that manufactures the IC chip in IC chip-including product level N to create valid first MR codes in the database of valid MR codes.
17 . The method of claim 16 , further comprising verifying the request from the downstream product manufacturer is received within a predetermined duration, and wherein the generating the second, valid MR code for the IC chip package in next, IC chip-including product level N+1 in the database of valid MR codes and invalidating the first MR code for the IC chip in IC chip-including product level N in the database of valid MR codes occurs in response to both verifying the first MR code for the IC chip in IC chip-including product level N is valid and verifying the request is received within the predetermined duration.
18 . The method of claim 12 , wherein the verifying the first MR code for the IC chip in IC chip-including product level N is based on a request from the downstream product manufacturer.
19 . The method of claim 12 , wherein the product manufacturing chain includes at least two of the following product manufacturers: an IC chip fabricator, an IC chip separator, an IC chip module manufacturer, an IC chip packager, an IC chip package end user, a printed circuit board (PCB) manufacturer, and a PCB end user.
20 . A method comprising:
providing an integrated circuit (IC) chip in an IC chip-including product level N, formed at an upstream product manufacturer, wherein the IC chip includes a first machine-readable (MR) code thereon;
verifying the first MR code for the IC chip-including product level N is valid by comparing the first MR code to a database of valid MR codes;
generating a second, valid MR code for a next, IC chip-including product level N+1 in the database of valid MR codes and invalidating the first MR code for the IC chip-including product level N in the database of valid MR codes in response to verifying the first MR code for the IC chip-including product level N is valid;
forming an IC chip package, including the IC chip, in the next, IC chip-including product level N+1 at a downstream product manufacturer, the IC chip package including the second MR code thereon, for use with the next, IC chip-including product level N+1; and
granting live access to the database of valid MR codes to the upstream product manufacturer and the downstream product manufacturer.