IP Library Granted Patent US 12,563,780
Granted Patent B2
US 12,563,780 · App. 17/581,632 · Granted Feb 24, 2026

Semiconductor device structure and method for forming the same

Inventors: Shih-Hao Lin (Hsinchu, TW); Chih-Chuan Yang (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D30/6735H10D30/031H10D30/6757H10D62/118H10D62/151H10D64/018H10D64/258
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Quick Facts
Patent No.
US 12,563,780
App. No.
17/581,632
Granted
Feb 24, 2026
Kind
B2
Abstract

A semiconductor device structure includes nanostructures disposed over a substrate. The structure also includes a gate structure surrounding the nanostructures. The structure also includes inner spacers disposed over opposite sides of the gate structure. The structure also includes source/drain epitaxial structure disposed over opposite sides of the nanostructures. An air gap is disposed between the inner spacers and the source/drain epitaxial structure.

Claims (77)

1 . A semiconductor device structure, comprising:

nanostructures formed over a substrate;

a gate structure surrounding each of the nanostructures;

inner spacers adjacent the gate structure and interleaving the nanostructures; and

a source/drain epitaxial structure in direct contact with sidewalls of the nanostructures,

wherein the source/drain epitaxial structure comprises:

a bottom epitaxial feature interfacing the substrate,

epitaxial features interfacing the sidewalls of the nanostructures,

a first epitaxial layer interfacing a top surface of the bottom epitaxial feature and the epitaxial features, and

a second epitaxial layer over the first epitaxial layer,

wherein the epitaxial features are doped,

wherein the bottom epitaxial feature comprises undoped silicon or undoped silicon germanium,

wherein an air gap is formed between one of the inner spacers and the source/drain epitaxial structure,

wherein the air gap is spaced apart from the second epitaxial layer.

2 . The semiconductor device structure as claimed in claim 1 ,

wherein each of the epitaxial features has a diamond shape.

3 . The semiconductor device structure as claimed in claim 1 ,

wherein the epitaxial features and the first epitaxial layer comprise a dopant,

wherein a dopant concentration of the first epitaxial layer is greater than a dopant concentration of the epitaxial features,

wherein the epitaxial features are separate from each other.

4 . The semiconductor device structure as claimed in claim 1 , wherein the inner spacers have convex sidewalls facing the source/drain epitaxial structure.

5 . The semiconductor device structure as claimed in claim 1 ,

wherein the first epitaxial layer comprises a bottom portion disposed directly on the bottom epitaxial feature and a sidewall portion interfacing the epitaxial features,

wherein the second epitaxial layer is spaced apart from the epitaxial features, and the bottom epitaxial feature by the first epitaxial layer.

6 . The semiconductor device structure as claimed in claim 1 ,

wherein the epitaxial features comprise silicon germanium.

7 . The semiconductor device structure as claimed in claim 1 , wherein the epitaxial features and the first epitaxial layer are exposed in the air gap.

8 . A semiconductor device structure, comprising:

nanostructures disposed over a substrate;

a gate structure wrapping around each of the nanostructures;

inner spacers vertically interleaving the nanostructures;

an un-doped epitaxial layer disposed on the substrate; and

a source/drain epitaxial structure comprising:

a pre-layer in direct contact with sidewalls of the nanostructures,

a first epitaxial layer in direct contact with the pre-layer and the un-doped epitaxial layer, and

a second epitaxial layer in direct contact with the first epitaxial layer and spaced apart from the substrate by the first epitaxial layer and the un-doped epitaxial layer,

wherein air gaps are horizontally disposed between inner spacers and the source/drain epitaxial structure,

wherein a portion of each of the air gaps extends vertically between two adjacent ones of the nanostructures,

wherein a composition of the un-doped epitaxial layer is different from a composition of the pre-layer,

wherein the first epitaxial layer and the pre-layer are exposed in the air gaps,

wherein the second epitaxial layer is spaced apart from the air gaps.

9 . The semiconductor device structure of claim 8 ,

wherein the un-doped epitaxial layer comprises undoped silicon,

wherein the pre-layer comprises silicon germanium.

10 . The semiconductor device structure of claim 8 , wherein the pre-layer comprises a diamond shape.

11 . The semiconductor device structure of claim 8 , wherein a portion of the first epitaxial layer in contact with the pre-layer also comprises a diamond shape.

12 . The semiconductor device structure of claim 8 ,

wherein the pre-layer, the first epitaxial layer and the second epitaxial layer comprise a dopant,

wherein a concentration of the dopant in the second epitaxial layer is greater than a concentration of the dopant in the first epitaxial layer,

wherein the concentration of the dopant in the first epitaxial layer is greater than a concentration of the dopant in the pre-layer,

wherein the un-doped epitaxial layer is free of dopant.

13 . A semiconductor device structure, comprising:

nanostructures disposed over a substrate;

a gate structure wrapping around each of the nanostructures;

inner spacers vertically interleaving the nanostructures; and

a source/drain epitaxial structure in direct contact with sidewalls of the nanostructures,

wherein air gaps are horizontally disposed between inner spacers and the source/drain epitaxial structure,

wherein the source/drain epitaxial structure comprises:

an un-doped epitaxial layer interfacing the substrate,

a pre-layer interfacing the sidewalls of the nanostructures,

a first epitaxial layer in direct contact with the un-doped epitaxial layer and the pre-layer, and

a second epitaxial layer in direct contact with the first epitaxial layer and spaced apart from the un-doped epitaxial layer,

wherein a portion of each of the air gaps extends vertically between two adjacent ones of the nanostructures,

wherein the pre-layer and the first epitaxial layer are exposed in the air gaps

wherein the second epitaxial layer is spaced apart from the air gaps.

14 . The semiconductor device structure of claim 13 ,

wherein a composition of the un-doped epitaxial layer is different from a composition of the pre-layer.

15 . The semiconductor device structure of claim 13 , wherein the pre-layer comprises a diamond shape.

16 . The semiconductor device structure of claim 13 , wherein a portion of the first epitaxial layer in contact with the pre-layer also comprises a diamond shape.

17 . The semiconductor device structure of claim 8 , wherein the pre-layer and the first epitaxial layer are exposed in the air gaps.

18 . The semiconductor device structure of claim 13 ,

wherein the un-doped epitaxial layer comprises silicon and is not doped,

wherein the pre-layer comprises silicon germanium and is doped.

19 . The semiconductor device structure of claim 8 ,

wherein the second epitaxial layer interfaces the pre-layer,

wherein the second epitaxial layer is spaced apart from the un-doped epitaxial layer.

20 . The semiconductor device structure of claim 8 , wherein an interface between the first epitaxial layer and the un-doped epitaxial layer is free of the pre-layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2022
From: LIN, SHIH-HAO; YANG, CHIH-CHUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 058729/0880 →
Continuity (2)
Provisional Application 63257227 · Oct 19, 2021
Related Publication 20230123484A1 · Apr 20, 2023
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