IP Library › Granted Patent US 12,567,388
Granted Patent B2
US 12,567,388 · App. 18/726,925 · Granted Mar 3, 2026

Method for controlling active matrix displays, corresponding controller, and computer program product

Inventor: Achim Doebler (Vilsheim, DE)
Assignee: PENNY PIXEL, INC.
G09G3/3648G09G3/2003G09G5/36
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Quick Facts
Patent No.
US 12,567,388
App. No.
18/726,925
Granted
Mar 3, 2026
Kind
B2
Abstract

A method for controlling active matrix displays in an inexpensive manner, in particular with a highly flexible color diversity, includes running a program stored in a program storage device of a microcontroller. The program actuates a DMA controller to read image data of the color depth of 1 bit per pixel from a data storage device, and transmits via the DMA controller an RGB image data set generated by the program therefrom to a hardware SPI connected to the DMA controller. The hardware SPI transmits the RGB image data set to the active matrix display in a serial manner via the data output thereof, wherein in order to synchronize the data transmission to the active matrix display, the SPI clock output controls the pixel clock input of the active matrix display.

Claims (46)

1 . A method for controlling active matrix displays, the method comprising:

loading a data storage device with image data of an image to be displayed on an active matrix display, the image data in a color depth of one bit per pixel;

executing a program stored in a program storage device of a microcontroller and which controls a direct memory access (DMA) controller such that the DMA controller reads the image data from the data storage device, and the program extends the read image data by adding additional blanking data which correspond to the specification of a parallel RGB interface such that an RGB image data set (frame) which can be read in by the active matrix display is generated;

transmitting the RGB image data set generated by the program using the DMA controller to a hardware serial peripheral interface (SPI) connected to the DMA controller, wherein the SPI transmits the RGB image data set serially to the active matrix display via a data output of the SPI, and wherein a clock output of the SPI actuates a pixel clock input of the active matrix display to synchronize the data transmission to the active matrix display;

feeding a serial data stream of the image data transmitted via the data output to a corresponding first input of one or more AND gates;

providing with the program, control data for masking the data stream before the masked data stream is fed to one or more RGB inputs of the active matrix display via at least one general purpose input/output (GPIO) of the microcontroller, which GPIO is connected to a corresponding second input of the respective AND gate in each case;

actuating the at least one AND gate with the program to automatically set a desired RGB value; and

displaying an image on the display based on the transmitted image data.

2 . The method of claim 1 , wherein the program automatically adds the additional blanking data to the image data according to a predetermined specification when the program is executed to emulate a parallel RGB interface.

3 . The method of claim 2 , wherein the program automatically adds the additional blanking data by inserting the blanking data in portions into a serial data stream of the image data in accordance with a row-by-row and column-by-column grid.

4 . The method of claim 3 , wherein inserting the blanking data in portions into the serial data stream comprises inserting a number of dummy bytes corresponding to the specification of the parallel RGB interface into the data stream of the image data.

5 . The method of claim 1 , further comprising:

automatically synchronously generating with the program synchronization signals required for a synchronized reading of a serial data stream of the image data into the active matrix display; and

sending the synchronization signals by the program to the active matrix display via general purpose inputs/outputs (GPIOs) of the microcontroller.

6 . The method of claim 1 , wherein one or more RGB inputs of the active matrix display are connected to one another, and are jointly connected to the data output of the hardware SPI.

7 . The method of claim 1 , further comprising:

passing a serial data stream of the image data transmitted via the data output through an inverter before feeding the data to one or more RGB inputs of the active matrix display.

8 . The method of claim 1 , wherein the program stored in the program storage device, when executed, automatically switches the at least one AND gate in a time-synchronized manner with the data stream.

9 . The method of claim 8 , wherein at least one of:

the at least one AND gate is switched on the basis of the signal at the SPI clock output; or

the at least one AND gate is switched to change the color to be displayed on the active matrix display column by column, row by row, or pixel by pixel.

10 . A controller, comprising:

a data storage device configured for storing image data in a color depth of one bit per pixel of an image to be displayed on an active matrix display; and

a microcontroller having a program storage device in which a program is stored, the program designed and configured to carry out the method of claim 1 .

11 . The controller of claim 10 , wherein:

the microcontroller controls a DMA controller instructed by the program, and a hardware SPI connected to the DMA controller in such a way that an RGB image data set generated by the program can be transmitted by the DMA controller to the hardware SPI such that the hardware SPI sends the RGB image data set serially to the active matrix display via a data output of the hardware SPI; and

a clock output of the hardware SPI is connected to a pixel clock input of the active matrix display in order to synchronize the data transmission to the active matrix display.

12 . A method for controlling active matrix displays, the method comprising:

loading a data storage device with image data of an image to be displayed on an active matrix display, the image data in a color depth of one bit per pixel;

executing a program stored in a program storage device of a microcontroller and which controls a direct memory access (DMA) controller such that the DMA controller reads the image data from the data storage device, and the program extends the read image data by adding additional blanking data which correspond to the specification of a parallel RGB interface such that an RGB image data set (frame) which can be read in by the active matrix display is generated;

transmitting the RGB image data set generated by the program using the DMA controller to a hardware serial peripheral interface (SPI) connected to the DMA controller, wherein the SPI transmits the RGB image data set serially to the active matrix display via a data output of the SPI, and wherein a clock output of the SPI actuates a pixel clock input of the active matrix display to synchronize the data transmission to the active matrix display;

sending the RGB image data set to an interface converter before transmitting the RGB image data set to the active matrix display;

converting the data stream of the RGB image data set with the interface converter into a modified data stream of another display interface; and

feeding the converted data stream to the active matrix display as an image data set; and

displaying an image on the display based on the transmitted image data.

13 . The method of claim 12 , wherein at least one of:

the interface converter converts the data stream into a modified data stream of a non-parallel RGB interface; or

the converted data stream is fed to an active matrix display with an interface other than a parallel RGB interface.

14 . A computer program product having program code stored on a non-transient, computer-readable storage medium, the program code, when executed on a controller, causing the controller to:

load a data storage device with image data of an image to be displayed on an active matrix display, the image data in a color depth of one bit per pixel;

control a direct memory access (DMA) controller such that the DMA controller reads the image data from the data storage device;

extend the read image data via the program by adding additional blanking data which correspond to the specification of a parallel RGB interface such that an RGB image data set (frame) which can be read in by the active matrix display is generated;

transmit the RGB image data set generated by the program using the DMA controller to a hardware serial peripheral interface (SPI) connected to the DMA controller, wherein the SPI transmits the RGB image data set serially to the active matrix display via a data output of the SPI, and wherein a clock output of the SPI actuates a pixel clock input of the active matrix display to synchronize the data transmission to the active matrix display;

feed a serial data stream of the image data transmitted via the data output to a corresponding first input of one or more AND gates;

provide with the program, control data for masking the data stream before the masked data stream is fed to one or more RGB inputs of the active matrix display via at least one general purpose input/output (GPIO) of the microcontroller, which GPIO is connected to a corresponding second input of the respective AND gate in each case; and

actuate the at least one AND gate with the program to automatically set a desired RGB value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2024
From: DOEBLER, ACHIM
To: PENNY PIXEL, INC.
Reel/Frame 067917/0276 →
Priority Claims (1)
DE 10 2022 119 130.3 · Jul 29, 2022 · national
Continuity (1)
Related Publication 20250157430A1 · May 15, 2025
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