IP Library Granted Patent US 12,572,421
Granted Patent B2
US 12,572,421 · App. 18/604,210 · Granted Mar 10, 2026

Wear-efficient error correction in a storage system

Inventors: Joern Engel (Mountain View, MA); Ronald Karr (Palo Alto, CA)
Assignee: PURE STORAGE, INC.
G06F11/1076G06F11/076G06F11/1016
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Quick Facts
Patent No.
US 12,572,421
App. No.
18/604,210
Granted
Mar 10, 2026
Kind
B2
Abstract

A set of correctable errors in a data segment stored at one or more storage devices is detected. Corresponding corrections for the set of correctable errors is stored in a data structure that is separate from the data segment. A read operation is performed to read data from the data segment by utilizing the corresponding corrections to replace one or more of the set of correctable errors in the data segment with the corresponding correction in the data structure.

Claims (35)

1 . A storage system, comprising:

a plurality of storage devices; and

a storage controller operatively coupled to the plurality of storage devices, the storage controller comprising a processing device configured to:

detect a set of correctable errors in a data segment stored at one or more of the plurality of storage devices;

store corresponding corrections for the set of correctable errors in a data structure that is separate from the data segment, wherein the corresponding corrections for the set of correctable errors are stored in the data structure in response to determining that the number of correctable errors in the set of correctable errors is within a threshold value of a correction capability of an error correction code (ECC); and

perform a read operation to read data from the data segment by utilizing the corresponding corrections to replace one or more of the set of correctable errors in the data segment with the corresponding correction in the data structure.

2 . The storage system of claim 1 , wherein the set of correctable errors are detected and corrected as individual bits that are identified as incorrect by the ECC.

3 . The storage system of claim 2 , wherein the ECC is a low density parity check code.

4 . The storage system of claim 1 , wherein the plurality of storage devices comprise non-volatile memory.

5 . The storage system of claim 1 , wherein the data structure comprises a listing of bit addresses and the corresponding corrections for the set of correctable errors.

6 . The storage system of claim 5 , wherein the listing of bit addresses is encoded as a bit offset from a previous bit address of the listing of bit addresses.

7 . The storage system of claim 1 , wherein the data segment is stored at one or more of the plurality of storage devices on behalf of a hyperscaler platform.

8 . The storage system of claim 1 , wherein the data segment is stored at one or more of the plurality of storage devices on behalf of a cloud platform.

9 . The storage system of claim 1 , wherein the processing device is further configured to:

determine whether an accumulated size of correction data structures for the data segment has exceeded a size threshold; and

in response to determining that the size of the data structure has exceeded the size threshold, initiate an operation to rewrite valid data from the data segment and the corresponding corrections to one or more different locations of the plurality of storage devices, utilizing the correction data in determining data content for the rewrite.

10 . A method, comprising:

detecting, by a processing device of a storage controller, a set of correctable errors in a data segment stored at one or more of a plurality of storage devices;

storing corresponding corrections for the set of correctable errors in a data structure that is separate from the data segment, wherein the corresponding corrections for the set of correctable errors are stored in the data structure in response to determining that the number of correctable errors in the set of correctable errors is within a threshold value of a correction capability of an error correction code (ECC); and

performing a read operation to read data from the data segment by utilizing the corresponding corrections to replace one or more of the set of correctable errors in the data segment with the corresponding correction in the data structure.

11 . The method of claim 10 , wherein the set of correctable errors are detected and corrected as individual bits that are identified as incorrect by the ECC.

12 . The method of claim 11 , wherein the ECC is a low density parity check code.

13 . The method of claim 11 wherein the plurality of storage devices comprise non-volatile memory.

14 . The method of claim 10 , wherein the data structure comprises a listing of bit addresses and the corresponding corrections for the set of correctable errors.

15 . A non-transitory computer readable storage medium storing instructions which, when executed, cause a processing device to:

detect a set of correctable errors in a data segment stored at one or more of a plurality of storage devices;

store corresponding corrections for the set of correctable errors in a data structure that is separate from the data segment, wherein the corresponding corrections for the set of correctable errors are stored in the data structure in response to determining that the number of correctable errors in the set of correctable errors is within a threshold value of a correction capability of an error correction code (ECC); and

perform a read operation to read data from the data segment by utilizing the corresponding corrections to replace one or more of the set of correctable errors in the data segment with the corresponding correction in the data structure.

16 . The non-transitory computer readable storage medium of claim 15 , wherein the set of correctable errors are detected and corrected as individual bits that are identified as incorrect by the ECC.

17 . The non-transitory computer readable storage medium of claim 16 , wherein the ECC is a low density parity check code.

18 . The non-transitory computer readable storage medium of claim 16 , wherein the plurality of storage devices comprise non-volatile memory.

19 . The non-transitory computer readable storage medium of claim 15 , wherein the data structure comprises a listing of bit addresses and the corresponding corrections for the set of correctable errors.

20 . The non-transitory computer readable storage medium of claim 15 , wherein the processing device is further to:

determine whether an accumulated size of correction data structures for the data segment has exceeded a size threshold; and

in response to determining that the size of the data structure has exceeded the size threshold, initiate an operation to rewrite valid data from the data segment and the corresponding corrections to one or more different locations of the plurality of storage devices, utilizing the correction data in determining data content for the rewrite.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2025
From: ENGEL, JOERN; KARR, RONALD
To: PURE STORAGE, INC.
Reel/Frame 070184/0322 →
Continuity (1)
Related Publication 20250291674A1 · Sep 18, 2025
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