IP Library › Granted Patent US 12,573,145
Granted Patent B2
US 12,573,145 · App. 17/855,268 · Granted Mar 10, 2026

Pipeline delay reduction for coarse visibility compression

Inventors: Kiia K. Kallio (Inkoo, FI); Anton Palm (Ulvila, FI)
Assignee: Advanced Micro Devices, Inc.
G06T17/10G06T1/60G06T9/001
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Quick Facts
Patent No.
US 12,573,145
App. No.
17/855,268
Granted
Mar 10, 2026
Kind
B2
Abstract

A processing system divides an image to be rendered into one or more tiles and performs a visibility pass on the primitives of the image. During the visibility pass, the processing system generates visibility data for each primitive of a draw call of the image based on a visible primitive count and a visible draw call count. In response to a primitive of the draw call being visible in the first tile, the processing system increments the visible primitive count and generates visibility data indicating that the primitives of the draw call are to be rendered using draw call index data stored in an on-chip memory. If the primitive is the first visible primitive of the draw call, the processing system further increments the visible draw call count. Additionally, the processing system renders the primitives of the draw call using the draw call index data stored in the on-chip memory.

Claims (48)

1 . A method comprising:

performing, based on a command stream, a visibility pass for an image to determine a plurality of primitives visible in a tile of the image; and

concurrently with the visibility pass and prior to flushing any visibility data of the plurality of primitives visible in the tile from a buffer associated with the tile, initiating rendering of a first primitive of the plurality of primitives visible in the tile using data stored in an on-chip memory based on a relationship between a visible primitive count to a binning threshold.

2 . The method of claim 1 , wherein the visibility pass includes:

in response to a current primitive being visible in the tile, incrementing the visible primitive count.

3 . The method of claim 1 , further comprising:

during the visibility pass, based on the visible primitive count being less than the binning threshold, generating data indicating the first primitive is to be rendered using draw call index data stored in the on-chip memory and not the visibility data of the plurality of primitives visible in the tile that is flushed from the buffer associated with the tile.

4 . The method of claim 3 , wherein the visible primitive count represents a running total of primitives currently determined to be visible in the tile during the visibility pass.

5 . The method of claim 1 further comprising:

rendering a second primitive of the plurality of primitives visible in the tile using the visibility data of the plurality of primitives after it is flushed from the buffer associated with the tile.

6 . The method of claim 5 , further comprising:

compressing all the visibility data of the plurality of primitives visible in the tile to produce compressed visibility data; and

storing the compressed visibility data in the buffer associated with the tile.

7 . The method of claim 6 , further comprising:

concurrently with flushing the compressed visibility data from the buffer, rendering a third primitive of the plurality of primitives visible in the tile.

8 . A method comprising:

during a visibility pass for a plurality of primitives and in response to a current primitive of the plurality of primitives associated with a draw call being visible in a tile of an image, incrementing a visible draw call count representing a number of draw calls associated with primitives currently determined to be visible in the tile by the visibility pass;

generating visibility data for the current primitive based on a relationship between the visible draw call count and a threshold; and

rendering the current primitive based on the visibility data.

9 . The method of claim 8 , wherein generating the visibility data comprises:

based on the visible draw call count being less than the threshold, generating visibility data indicating the current primitive is to be rendered based on draw call index data stored in an on-chip memory and not visibility data flushed from a buffer associated with the tile.

10 . The method of claim 9 , further comprising:

during the visibility pass for the plurality of primitives and in response to a second current primitive of the plurality of primitives associated with a second draw call being visible in a tile of an image, incrementing the visible draw call count.

11 . The method of claim 9 , further comprising:

during the visibility pass for the plurality of primitives and in response to a third current primitive of the plurality of primitives associated with the draw call being visible in a tile of an image, not incrementing the visible draw call count.

12 . The method of claim 8 , further comprising:

based on the visible draw call count being equal to or greater than the threshold, generating visibility data indicating vertex data of the current primitive.

13 . The method of claim 12 , further comprising:

compressing the visibility data to produce compressed visibility data; and

storing the compressed visibility data in a buffer associated with the tile.

14 . The method of claim 13 , further comprising:

flushing the compressed visibility data from the buffer into a memory, wherein the current primitive is rendered using the visibility data flushed from the buffer.

15 . A processor, comprising:

one or more processing units including circuitry configured to:

perform a visibility pass for an image based on a command stream to determine a plurality of primitives visible in a tile of the image; and

concurrently with the visibility pass and prior to flushing any visibility data of the plurality of primitives visible from a buffer associated with the tile, begin rendering a first primitive of the plurality of primitives visible in the tile using data stored in an on-chip memory based on a relationship between a visible primitive count to a binning threshold.

16 . The processor of claim 15 , further comprising:

during the visibility pass in response to a current primitive being visible in the tile, incrementing the visible primitive count.

17 . The processor of claim 15 , wherein the one or more processing units include circuitry configured to:

based on the visible primitive count being less than the binning threshold, generate data indicating the first primitive is to be rendered using draw call index data stored in the on-chip memory and not the visibility data of the plurality of primitives visible in the tile that is flushed from the buffer associated with the tile.

18 . The processor of claim 17 , wherein the visible primitive count represents a running total of primitives currently determined to be visible in the tile during the visibility pass.

19 . The processor of claim 15 , wherein the one or more processing units include circuitry configured to:

render a second primitive of the plurality of primitives visible in the tile using visibility data of the plurality of primitives visible in the tile flushed from the buffer associated with the tile.

20 . The processor of claim 19 , wherein the one or more processing units include circuitry configured to:

based on the visible primitive count being equal to or greater than the binning threshold, generate visibility data associated with the second primitive;

compress all the visibility data of the plurality of primitives visible in the tile to produce compressed visibility data;

store the compressed visibility data in the buffer associated with the tile; and

concurrently with flushing the compressed visibility data from the buffer, render a third primitive of the plurality of primitives visible in the tile.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 60509 FRAME: 690. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 8, 2025
From: KALLIO, KIIA K.; PALM, ANTON
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 073929/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2022
From: KALLIO, KIIA; PALM, ANTON
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 060509/0690 →
Continuity (1)
Related Publication 20240005602A1 · Jan 4, 2024
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