IP Library Granted Patent US 12,573,752
Granted Patent B2
US 12,573,752 · App. 18/601,689 · Granted Mar 10, 2026

Array lattice techniques for high symmetry and high scan performance

Inventors: Trang Thai (San Diego, CA); Jason Leo Durbin (San Diego, CA)
Assignee: Qorvo Texas, LLC
H01Q3/36H01Q9/045H01Q9/0478
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Quick Facts
Patent No.
US 12,573,752
App. No.
18/601,689
Granted
Mar 10, 2026
Kind
B2
Abstract

A phased array system has a substrate, a plurality of elements, a beamforming IC, and a plurality of feedlines electrically coupling the plurality of elements with at least one beamforming IC. In preferred embodiments, the feedlines are non-intersecting, symmetric feedlines that mitigate cross-polarization.

Claims (34)

1 . A phased array system comprising:

a substrate;

a plurality of dual-mode receive and transmit elements configured in a triangular lattice on the substrate, wherein the plurality of dual-mode receive and transmit elements are arranged in a slant polarization split feed configuration;

a beamforming integrated circuit (IC) on the substrate, the beamforming IC comprising a first set of dual-mode receive and transmit element interfaces configured to be polarized in a first polarization and a second set of dual-mode receive and transmit element interfaces configured to be polarized in a second polarization different than the first polarization; and

a plurality of feedlines electrically coupling the plurality of dual-mode receive and transmit elements with the beamforming IC,

wherein the plurality of dual-mode receive and transmit elements comprise a first element and a second element that is adjacent to the first element, each of the first and second elements comprising a positive polarization interface and a negative polarization interface, and

wherein the first element and the second element are offset by a physical distance such that the positive and negative polarization interfaces of the first element and the second element are collinear.

2 . The phased array system of claim 1 , wherein the feedlines each have a substantially same length.

3 . The phased array system of claim 1 , wherein the first polarization is orthogonal to the second polarization.

4 . The phased array system of claim 1 , wherein a first dual-mode receive and transmit element has first and second locations for receiving two feedlines of the plurality of feedlines, further wherein a second dual-mode receive and transmit element has third and fourth locations for receiving two feedlines of the plurality of feedlines, the first and third locations are configured for the first polarization, the second and fourth locations are configured for the second polarization.

5 . The phased array system of claim 1 , wherein the dual-mode receive and transmit elements are patch antenna elements.

6 . The phased array system of claim 1 , wherein the beamforming IC is further configured to generate a time division duplex waveform.

7 . The phased array system of claim 6 , wherein the time division duplex waveform is generated by isolating one of the plurality of dual-mode receive and transmit elements between transmit and receive using an orthogonal feed connection.

8 . A phased array system comprising:

a substrate;

a plurality of dual-mode receive and transmit elements configured in a triangular lattice on the substrate, wherein the plurality of dual-mode receive and transmit elements are arranged in a slant polarization split feed configuration;

an integrated circuit (IC) on the substrate, wherein the IC comprises a first set of element interfaces configured to be polarized in a first polarization and a second set of element interfaces configured to be polarized in a second polarization different than the first polarization; and

a plurality of feedlines electrically coupling the plurality of dual-mode receive and transmit elements with the first set of element interfaces and the second set of element interfaces,

wherein the plurality of dual-mode receive and transmit elements comprise a first element and a second element that is adjacent to the first element, each of the first and second elements comprising a positive polarization interface and a negative polarization interface, and

wherein the first element and the second element are offset by a physical distance such that the positive and negative polarization interfaces of the first element and the second element are collinear.

9 . The phased array system of claim 8 , wherein the substrate is a printed circuit board.

10 . The phased array system of claim 8 , wherein each of the plurality of dual-mode receive and transmit elements is a patch antenna element formed on the substrate.

11 . The phased array system of claim 8 , wherein the IC is surface mounted onto the substrate.

12 . The phased array system of claim 8 , wherein each of the plurality of feedlines have a length that is substantially the same.

13 . The phased array system of claim 8 , wherein the first polarization is orthogonal to the second polarization.

14 . The phased array system of claim 8 ,

wherein a first dual-mode receive and transmit element of the plurality of dual-mode receive and transmit elements comprises first and second locations for receiving two feedlines of the plurality of feedlines,

wherein a second dual-mode receive and transmit element of the plurality of dual-mode receive and transmit elements comprises third and fourth locations for receiving two feedlines of the plurality of feedlines,

wherein the first and third locations are configured for the first polarization, and

wherein the second and fourth locations are configured for the second polarization.

15 . The phased array system of claim 8 , wherein the IC is further configured to generate a time division duplex waveform.

16 . The phased array system of claim 15 , wherein the time division duplex waveform is generated by isolating one of the plurality of dual-mode receive and transmit elements between transmit and receive using an orthogonal feed connection.

17 . The phased array system of claim 1 , wherein the plurality of dual-mode receive and transmit elements are arranged relative to the beamforming IC such that the plurality of feedlines are non-intersecting, symmetric feedlines that mitigate cross-polarization between the first polarization and the second polarization.

18 . The phased array system of claim 8 , wherein the plurality of dual-mode receive and transmit elements are arranged relative to the IC such that the plurality of feedlines are non-intersecting, symmetric feedlines that mitigate cross-polarization between the first polarization and the second polarization.

Assignments (2)
MERGER Recorded Oct 20, 2025
From: ANOKIWAVE, INC.
To: QORVO TEXAS, LLC
Reel/Frame 072594/0923 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2025
From: THAI, TRANG; DURBIN, JASON LEO
To: ANOKIWAVE, INC.
Reel/Frame 071562/0181 →
Continuity (3)
Continuation 17716625 · Apr 8, 2022
Provisional Application 63173120 · Apr 9, 2021
Related Publication 20240364006A1 · Oct 31, 2024
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