IP Library › Granted Patent US 12,573,957
Granted Patent B2
US 12,573,957 · App. 18/591,596 · Granted Mar 10, 2026

Cross power management integrated circuit

Inventors: Yashovardhan Rao Potlapalli (Cary, CA); Brian Lee Allen (Holly Springs, NC); Mehul Dilip Shah (Cary, NC); Akshat Shenoy (Cary, NC); Milind Prakash Tile (Milpitas, CA)
Assignee: Renesas Electronics America Inc.
H02M3/1584H02M1/0025H02M1/0032H02M1/327H02M1/0009
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Quick Facts
Patent No.
US 12,573,957
App. No.
18/591,596
Granted
Mar 10, 2026
Kind
B2
Abstract

Systems and methods for power conversion are described. A power converter can operate under low power mode to supply a first load current from a power management integrated circuit (PMIC). The power converter can transition from low power mode to high power mode by one of activating a tri-state mode of the PMIC prior to activating at least one phase in an external power module and operating PMIC and at least one phase of the external power module simultaneously. The external power module and PMIC can be on separate chips. The power converter can operate under high power mode to supply a second load current from the external power module. The second load current can be greater than the first load current. The power converter can transition from high power mode to low power mode by selectively deactivating phases in the external power module prior to activating the PMIC.

Claims (68)

1 . A system comprising:

an external power module comprising a plurality of phases, wherein each one of the phases comprises a first power stage configured to convert an input voltage into an output voltage; and

a power management integrated circuit (PMIC) comprising:

a second power stage configured to convert the input voltage into the output voltage; and

a controller configured to:

operate the system in a high power mode to supply the output voltage at a first load current from the external power module to a load;

operate the system in a low power mode to supply the output voltage at a second load current from the PMIC to the load, wherein the second load current is less than the first load current;

transition from the high power mode to the low power mode by selectively deactivating phases among the plurality of phases in the external power module prior to activating the second power stage in the PMIC to supply the output voltage under the second load current; and

transition from the low power mode to the high power mode by performing at least one of:

activate a tri-state mode of the PMIC prior to activating at least one phase among the plurality of phases in the external power module; and

operate the PMIC and the at least one phase of the external power module simultaneously.

2 . The system of claim 1 , wherein the controller is configured to:

determine that an ambient temperature of the PMIC is greater than a predefined temperature threshold; and

in response to determination that the ambient temperature of the PMIC is greater than the predefined temperature threshold, operate the system in the high power mode.

3 . The system of claim 1 , wherein to transition from the high power mode to the low power mode, the controller is configured to selectively deactivate phases among the plurality of phases in the external power module by deactivating one phase at a time until the external power module operates under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases.

4 . The system of claim 1 , wherein to transition from the high power mode to the low power mode, the controller is configured to selectively deactivate phases among the plurality of phases in the external power module by deactivating all but one activated phase among activated phases in the plurality of phases.

5 . The system of claim 1 , wherein to transition from the high power mode to the low power mode, the controller is configured to:

selectively deactivate phases among the plurality of phases in the external power module to operate the external power module under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases;

determine that a duration in which the external power module remains operated under the one-phase mode exceeds a predefined timer; and

in response to determination that the duration in which the external power module remains operated under the one-phase mode exceeds the predefined timer, activate the second power stage in the PMIC and deactivate the one activated phase in the one-phase mode of the external power module.

6 . The system of claim 1 , wherein to transition from the low power mode to the high power mode, the controller is configured to:

activate a tri-state mode of the external power module;

determine an inductor current of an output inductor connected to the second power stage is driven to zero; and

in response to determination that the inductor current of the output inductor connected to the second power stage is driven to zero, deactivate the second power stage in the PMIC.

7 . The system of claim 6 , wherein the controller is configured to determine the inductor current of the output inductor connected to the second power stage is driven to zero by determining a lapse of a predefined timer.

8 . A semiconductor device comprising:

a first power stage configured to convert an input voltage into an output voltage; and

a controller configured to:

perform power conversion in a low power mode to supply the output voltage at a first load current from the first power stage to a load;

perform power conversion in a high power mode to supply the output voltage at a second load current from an external power module to the load, wherein the external power module comprises a plurality of phases, each one of the phases comprises a second power stage configured to convert the input voltage into the output voltage, and the second load current is greater than the first load current;

transition from the high power mode to the low power mode by selectively deactivating phases among the plurality of phases in the external power module prior to activating the first power stage in the PMIC to supply the output voltage to the load; and

transition from the low power mode to the high power mode by performing at least one of:

activate a tri-state mode of the PMIC prior to activating at least one phase among the plurality of phases in the external power module; and

operate the PMIC and the at least one phase of the external power module simultaneously.

9 . The semiconductor device of claim 8 , wherein the controller is configured to:

determine that an ambient temperature of the PMIC is greater than a predefined temperature threshold; and

in response to determination that the ambient temperature of the PMIC is greater than the predefined temperature threshold, perform the power conversion in the high power mode.

10 . The semiconductor device of claim 8 , wherein to transition from the high power mode to the low power mode, the controller is configured to selectively deactivate phases among the plurality of phases in the external power module by deactivating one phase at a time until the external power module operates under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases.

11 . The semiconductor device of claim 8 , wherein to transition from the high power mode to the low power mode, the controller is configured to selectively deactivate phases among the plurality of phases in the external power module by deactivating all but one activated phase among activated phases in the plurality of phases.

12 . The semiconductor device of claim 8 , wherein to transition from the high power mode to the low power mode, the controller is configured to:

selectively deactivate phases among the plurality of phases in the external power module to operate the external power module under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases;

determine that a duration in which the external power module remains operated under the one-phase mode exceeds a predefined timer; and

in response to determination that the duration in which the external power module remains operated under the one-phase mode exceeds the predefined timer, activate the first power stage in the PMIC and deactivate the one activated phase in the one-phase mode of the external power module.

13 . The semiconductor device of claim 8 , wherein to transition from the low power mode to the high power mode, the controller is configured to:

activate a tri-state mode of the external power module;

determine an inductor current of an output inductor connected to the first power stage is driven to zero; and

in response to determination that the inductor current of the output inductor connected to the first power stage is driven to zero, deactivate the first power stage in the PMIC.

14 . The semiconductor device of claim 13 , wherein the controller is configured to determine the inductor current of the output inductor connected to the first power stage is driven to zero by determining a lapse of a predefined timer.

15 . A method comprising:

operating a power converter under a low power mode to convert an input voltage into an output voltage for supplying the output voltage at a first load current from a power management integrated circuit (PMIC) to a load;

transitioning the power converter from the low power mode to a high power mode by performing at least one of:

activating a tri-state mode of the PMIC prior to activating at least one phase among a plurality of phases in an external power module, wherein the external power module and the PMIC are on separate chips; and

operating the PMIC and the at least one phase of the external power module simultaneously;

operating the power converter under the high power mode to convert the input voltage into the output voltage for supplying the output voltage at a second load current from the external power module to the load, wherein the second load current is greater than the first load current; and

transitioning the power converter from the high power mode to the low power mode by selectively deactivating phases among a plurality of phases in the external power module prior to activating a power stage in the PMIC to supply the output voltage to the load.

16 . The method of claim 15 , further comprising:

determining that an ambient temperature of the PMIC is greater than a predefined temperature threshold; and

in response to determining that the ambient temperature of the PMIC is greater than the predefined temperature threshold, operating the power converter under the high power mode.

17 . The method of claim 15 , wherein selectively deactivate phases among the plurality of phases in the external power module comprises deactivating one phase at a time until the external power module operates under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases.

18 . The method of claim 15 , wherein selectively deactivate phases among the plurality of phases in the external power module comprises deactivating all but one activated phase among activated phases in the plurality of phases.

19 . The method of claim 15 , wherein transitioning from the high power mode to the low power mode comprises:

selectively deactivating phases among the plurality of phases in the external power module to operate the external power module under a one-phase mode, wherein the one-phase mode comprises one activated phase among the plurality of phases;

determining that a duration in which the external power module remains operated under the one-phase mode exceeds a predefined timer; and

in response to determining that the duration in which the external power module remains operated under the one-phase mode exceeds the predefined timer, activating the power stage in the PMIC and deactivate the one activated phase in the one-phase mode of the external power module.

20 . The method of claim 15 , wherein transitioning from the low power mode to the high power mode comprises:

activating a tri-state mode of the external power module;

determining an inductor current of an output inductor connected to the power stage is driven to zero; and

in response to determining that the inductor current of the output inductor connected to the power stage in the PMIC is driven to zero, deactivating the power stage in the PMIC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 29, 2024
From: POTLAPALLI, YASHOVARDHAN RAO; ALLEN, BRIAN LEE; SHAH, MEHUL DILIP; SHENOY, AKSHAT; TILE, MILIND PRAKASH
To: RENESAS ELECTRONICS AMERICA INC.
Reel/Frame 066608/0321 →
Continuity (2)
Provisional Application 63488461 · Mar 3, 2023
Related Publication 20240297588A1 · Sep 5, 2024
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