IP Library › Granted Patent US 12,574,052
Granted Patent B2
US 12,574,052 · App. 18/240,162 · Granted Mar 10, 2026

Neural-network-optimized degree-specific weights for LDPC minsum decoding

Inventors: Richard D. Wesel (Manhattan Beach, CA); Linfang Wang (Los Angeles, CA); Sean Chen (Los Angeles, CA); Dariush Divsalar (Pacific Palisades, CA); Jonathan Nguyen (Los Angeles, CA)
Assignees: The Regents of the University of California; California Institute of Technology
H03M13/1111
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Quick Facts
Patent No.
US 12,574,052
App. No.
18/240,162
Granted
Mar 10, 2026
Kind
B2
Abstract

Neural Normalized MinSum (N-NMS) decoding for improving frame error rate (FER) performance on linear block codes over conventional normalized MinSum (NMS). Dynamic multiplicative weights are assigned to each check-to-variable message in each iteration to efficiently provide training parameters of N-NMS that support N-NMS for longer block lengths. Embodiment are described for neural two-dimensional normalized MinSum (N-2D-NMS) decoders requiring fewer training parameters. The N-2D-NMS approaches for example use the same weight for edges with the same check and/or variable node degree. Simulation results indicate that that this LDPC decoding performs similarly to previous techniques while substantially reducing the amount of training necessary.

Claims (48)

1. A decoder for a low-density parity-check (LDPC) code, comprising:

variable nodes connected to check nodes, where the variable nodes and check nodes are implemented in at least one of a programmable device and an integrated circuit;

passing of messages between the variable nodes and the check nodes; and

performing weighting in which at least a portion of the messages are weighted using weights determined by a neural network, where neural network is implemented in at least one of a programmable device and an integrated circuit;

wherein groups of said weighted messages that have the same degree for one or more specified nodes are constrained to have the same weight for the same iteration.

2. The apparatus of claim 1 :

wherein said weighted messages that are check-to-variable messages are weighted using weights determined by the neural network; and

wherein said groups of weighted check-to-variable messages that have the same check node degree are constrained to have the same weight.

3. The apparatus of claim 1 :

wherein said weighted messages that are check-to-variable messages are weighted using weights determined by the neural network; and

wherein said groups of weighted check-to-variable messages that have the same variable node degree are constrained to have the same weight.

4. The apparatus of claim 1 :

wherein said weighted messages that are check-to-variable messages are weighted using weights determined by the neural network; and

wherein said groups of weighted check-to-variable messages that have both the same variable node degree, and the same check node degree are constrained to have the same weight.

5. The apparatus of claim 1 :

wherein said weighted messages that are check-to-variable messages are weighted using weights determined by the neural network;

wherein the said weighted check-to-variable messages have weights that are the product of two scale factors α and β; and

wherein β is determined by the check node degree and α is determined by the variable node degree.

6. The apparatus of claim 1 :

wherein said weighted messages that are variable-to-check messages are weighted using weights determined by the neural network; and

wherein said groups of weighted variable-to-check messages that have the same check node degree are constrained to have the same weight.

7. The apparatus of claim 1 :

wherein said weighted messages that are variable-to-check messages are weighted using weights determined by the neural network; and

wherein said groups of weighted variable-to-check messages that have the same variable node degree are constrained to have the same weight.

8. The apparatus of claim 1 :

wherein said weighted messages that are variable-to-check messages are weighted using weights determined by the neural network; and

wherein said groups of weighted variable-to-check messages that have both the same variable node degree, and the same check node degree are constrained to have the same weight.

9. The apparatus of claim 1 :

wherein said weighted messages that are variable-to-check messages are weighted using weights determined by the neural network;

wherein said weighted variable-to-check messages have weights that are the product of two scale factors α and β; and

wherein β is determined by the check node degree and α is determined by the variable node degree.

10. The apparatus of claim 1 , wherein said weighted messages are weighted using weights determined by the neural network trained for optimizing dynamic multiplicative weights that can change depending on the variable node degree, check node degree, and iteration.

11. The apparatus of claim 1 , wherein the decoder is implemented in a field programmable gate array (FPGA) device.

12. The apparatus of claim 1 , wherein the neural network uses both feedforward and recurrent layers so that said weighted messages stop changing with each iteration after a specified number of iterations.

13. The apparatus of claim 1 , wherein said weighted messages are trained so that they can change with each iteration.

14. The apparatus of claim 1 , wherein said weighted messages are trained so that they remain the same for all iterations.

15. A decoder for a low-density parity-check (LDPC) code, comprising:

variable nodes connected to check nodes, where the variable nodes and check nodes are implemented in at least one of a programmable device and an integrated circuit;

wherein the connections between variable nodes and check nodes are structured according to a protograph having a protomatrix;

passing of messages between the variable nodes and the check nodes;

message weighting in which at least a portion of the messages are weighted using weights determined by a neural network, where the neural network is implemented in at least one of a programmable device and an integrated circuit; and

wherein weighted edges that correspond to the same row of a protomatrix of the protograph are constrained to have the same weight.

16. A decoder for a low-density parity-check (LDPC) code, comprising:

variable nodes connected to check nodes, where the variable nodes and check nodes are implemented in at least one of a programmable device and an integrated circuit;

wherein connections between variable nodes and check nodes are structured according to a protograph having a protomatrix;

passing of messages between the variable nodes and the check nodes;

wherein at least a portion of the messages are weighted using weights determined by a neural network, where the neural network is implemented in at least one of a programmable device and an integrated circuit; and

wherein said weighted edges that correspond to the same column of the protomatrix of the protograph are constrained to have the same weight.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2023
From: WESEL, RICHARD D.; WANG, LINFANG; CHEN, SEAN; NGUYEN, JONATHAN
To: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Reel/Frame 065722/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2023
From: DIVSALAR, DARIUSH
To: CALIFORNIA INSTITUTE OF TECHNOLOGY
Reel/Frame 065722/0893 →
Continuity (3)
Continuation PCTUS2022018945 · Mar 4, 2022
Provisional Application 63157061 · Mar 5, 2021
Related Publication 20240154626A1 · May 9, 2024
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