IP Library › Granted Patent US 12,578,969
Granted Patent B2
US 12,578,969 · App. 18/488,287 · Granted Mar 17, 2026

Bios code storage subsystem modification system wherein based on first or second initialization of computing device perform a reboot

Inventors: Ching-Lung Chao (Austin, TX); Yiping Zhou (Houston, TX); David Keith Chalfant (Round Rock, TX); Wei Liu (Austin, TX); Parth Girishkumar Bera (Bangalore, IN); Po-Yu Cheng (Tainan, TW); Yu-Hsuan Chou (New Taipei, TW)
Assignee: Dell Products L.P.
G06F9/4403
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Quick Facts
Patent No.
US 12,578,969
App. No.
18/488,287
Granted
Mar 17, 2026
Kind
B2
Abstract

A BIOS code storage subsystem modification system includes a computing device having BIOS code storage device modification subsystem coupled to a BIOS storage system that includes a BIOS code storage device and a BIOS data storage device. The BIOS code storage device modification subsystem receives a BIOS code storage device modification interrupt and, in response, provides BIOS code storage device modification information in the BIOS data storage device. Subsequent to providing the BIOS code storage device modification information in the BIOS data storage device, the BIOS code storage device modification subsystem causes the computing device to perform a first reboot. During a first initialization of the computing device in response to the first reboot, a BIOS in the computing device identifies the BIOS code storage device modification information in the BIOS data storage device, and uses the BIOS code storage device modification information to modify the BIOS code storage device.

Claims (63)

1 . A Basic Input/Output System (BIOS) code storage subsystem modification system, comprising:

a computing device;

a Basic Input/Output System (BIOS) storage system that is included in the computing device and that includes a BIOS code storage device and a BIOS data storage device;

a BIOS code storage device modification subsystem that is included in the computing device and coupled to the BIOS storage system, wherein the BIOS code storage device modification subsystem is configured to:

receive a BIOS code storage device modification interrupt;

provide, in response to receiving the BIOS code storage device modification interrupt, BIOS code storage device modification information in the BIOS data storage device; and

cause, subsequent to providing the BIOS code storage device modification information in the BIOS data storage device, the computing device to perform a first reboot;

a BIOS that is included in the computing device and coupled to the BIOS storage system, wherein the BIOS is configured, during a first initialization of the computing device in response to the first reboot, to:

identify the BIOS code storage device modification information in the BIOS data storage device;

use the BIOS code storage device modification information to modify the BIOS code storage device; and

cause, subsequent to using the BIOS code storage device modification information to modify the BIOS code storage device, the computing device to perform a second reboot; and

a processing system that is included in the computing device and coupled to the BIOS storage system, wherein the processing system is configured, during a second initialization of the computing device in response to the second reboot, to:

identify a scheduled operation to perform based the modification of the BIOS code storage device using the BIOS code storage device modification information; and

perform the scheduled operation.

2 . The system of claim 1 , wherein the BIOS performs the operations of the BIOS code storage device modification subsystem.

3 . The system of claim 1 , wherein an application running on the computing device performs at least some of the operations of the BIOS code storage device modification subsystem.

4 . The system of claim 1 , wherein the BIOS is configured to:

erase, in response to using the BIOS code storage device modification information to modify the BIOS code storage device, the BIOS code storage device modification information from the BIOS data storage device.

5 . The system of claim 1 , wherein the BIOS code storage device modification information includes memory device repair scheduling information.

6 . The system of claim 5 ,

wherein the processing system is configured to:

identify the memory device repair scheduling information in the BIOS code storage device; and

use the memory device repair scheduling information to perform memory repair operations on a memory device that is included in the computing device.

7 . The system of claim 5 , wherein the BIOS code storage device modification information including the memory device repair scheduling information is provided in a processor configuration block included in the BIOS code storage device.

8 . An Information Handling System (IHS), comprising:

a processing system; and

a memory system that is coupled to the processing system and that includes instructions that, when executed by the processing system, cause the processing system to provide a Basic Input/Output System (BIOS) code storage device modification engine that is configured to:

receive a BIOS code storage device modification interrupt;

provide, in response to receiving the BIOS code storage device modification interrupt, BIOS code storage device modification information in a BIOS data storage device that is included in a BIOS storage system;

cause, subsequent to providing the BIOS code storage device modification information in the BIOS data storage device, the IHS to perform a first reboot;

identify, during a first initialization of the IHS in response to the first reboot, the BIOS code storage device modification information in the BIOS data storage device; and

use, during the first initialization of the IHS in response to the first reboot, the BIOS code storage device modification information to modify a BIOS code storage device that is included in a BIOS storage system;

cause, subsequent to using the BIOS code storage device modification information to modify the BIOS code storage device, the IHS to perform a second reboot,

wherein the processing system is configured, during a second initialization of the computing device in response to the second reboot, to:

identify a scheduled operation to perform based the modification of the BIOS code storage device using the BIOS code storage device modification information; and

perform the scheduled operation.

9 . The IHS of claim 8 , wherein the processing system is a BIOS processing system, and the memory system is a BIOS memory system that includes instruction that, when executed by the BIOS processing system, cause the BIOS processing system to provide a BIOS that is configured to perform the operations of the BIOS code storage device modification engine.

10 . The IHS of claim 8 , wherein the processing system includes a primary processing subsystem, and the memory system includes a primary memory subsystem including instruction that, when executed by the primary processing subsystem, cause the primary processing subsystem to provide an application that is included in the BIOS code storage device modification engine and that is configured to receive the BIOS code storage device modification interrupt, provide the BIOS code storage device modification information in the BIOS data storage device, and cause the IHS to perform the first reboot, and

wherein the processing system includes a BIOS processing subsystem, and the memory system includes a BIOS memory subsystem including instruction that, when executed by the BIOS processing subsystem, cause the BIOS processing subsystem to provide a BIOS that is included in the BIOS code storage device modification engine and that is configured, during the first initialization of the IHS in response to the first reboot, to identify the BIOS code storage device modification information in the BIOS data storage device, and use the BIOS code storage device modification information to modify the BIOS code storage device.

11 . The IHS of claim 8 , wherein the BIOS code storage device modification engine is configured to:

erase, in response to using the BIOS code storage device modification information to modify the BIOS code storage device, the BIOS code storage device modification information from the BIOS data storage device.

12 . The IHS of claim 8 , wherein the BIOS code storage device modification information includes memory device repair scheduling information.

13 . The IHS of claim 8 ,

wherein the memory system includes instruction that, when executed by the processing subsystem, cause the processing subsystem to provide a memory repair engine that is configured, during a second initialization of the computing device in response to the second reboot, to:

use the memory device repair scheduling information to perform memory repair operations on a memory device that is included in the computing device.

14 . A method for modifying a Basic Input/Output System (BIOS) code storage subsystem, comprising:

receiving, by a Basic Input/Output System (BIOS) code storage device modification subsystem, a BIOS code storage device modification interrupt;

providing, by the BIOS code storage device modification subsystem in response to receiving the BIOS code storage device modification interrupt, BIOS code storage device modification information in a BIOS data storage device that is included in a BIOS storage system;

causing, by the BIOS code storage device modification subsystem subsequent to providing the BIOS code storage device modification information in the BIOS data storage device, a computing device that includes the BIOS code storage device modification subsystem and the BIOS storage system to perform a first reboot;

identifying, by the BIOS code storage device modification subsystem during a first initialization of the computing device in response to the first reboot, the BIOS code storage device modification information in the BIOS data storage device;

using, by the BIOS code storage device modification subsystem during the first initialization of the computing device, the BIOS code storage device modification information to modify a BIOS code storage device that is included in a BIOS storage system;

causing, by the BIOS code storage device modification subsystem during the first initialization of the computing device and subsequent to using the BIOS code storage device modification information to modify the BIOS code storage device, the computing device to perform a second reboot;

identifying, by a processing system during a second initialization of the computing device in response to the second reboot, a scheduled operation to perform based the modification of the BIOS code storage device using the BIOS code storage device modification information; and

performing, by the processing system during the second initialization of the computing device, the scheduled operation.

15 . The method of claim 14 , wherein a BIOS in the computing device performs the operations of the BIOS code storage device modification subsystem.

16 . The method of claim 14 , wherein an application running on the computing device performs at least some of the operations of the BIOS code storage device modification subsystem.

17 . The method of claim 14 , further comprising:

erasing, by the BIOS code storage device modification subsystem in response to using the BIOS code storage device modification information to modify the BIOS code storage device, the BIOS code storage device modification information from the BIOS data storage device.

18 . The method of claim 14 , wherein the BIOS code storage device modification information includes memory device repair scheduling information.

19 . The method of claim 18 , further comprising:

identifying, by the processing system during the second initialization of the computing device, the memory device repair scheduling information in the BIOS code storage device; and

using, by the processing system during the second initialization of the computing device, the memory device repair scheduling information to perform memory repair operations on a memory device that is included in the computing device.

20 . The method of claim 18 , wherein the BIOS code storage device modification information including the memory device repair scheduling information is provided in a processor configuration block included in the BIOS code storage device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2023
From: CHAO, CHING-LUNG; ZHOU, YIPING; CHALFANT, DAVID KEITH; LIU, WEI; BERA, PARTH GIRISHKUMAR; CHENG, PO-YU; CHOU, YU-HSUAN
To: DELL PRODUCTS L.P.
Reel/Frame 065251/0354 →
Continuity (1)
Related Publication 20250123847A1 · Apr 17, 2025
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