Granted Patent B2

US 12,579,412 · App. 17/538,539 · Granted Mar 17, 2026

Inventor: Kwang Il Oh (Daejeon, KR)

Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

G06N3/049G06N3/065H03K3/354

Abstract

Claims (49)

1 . A spike neural network circuit comprising:

a self-correcting control circuit configured to generate an input signal and a first control code;

a bias voltage generation circuit configured to generate a first bias voltage based on the first control code;

a synaptic circuit including a first synaptic column configured to perform an operation of the input signal and a first weight signal based on the first bias voltage and to generate a first operation signal;

a neuron circuit including a first neuron configured to generate a first output signal based on a comparison of the first operation signal and a threshold voltage; and

a spike comparison circuit configured to generate a first comparison signal corresponding to a difference between an actual number of pulses included in the first output signal and a target number of pulses indicated by a reference number, and

wherein the self-correcting control circuit is further configured to generate a second control code for correcting the first bias voltage based on the first control code and the first comparison signal,

wherein the bias voltage generation circuit is further configured to generate a second bias volage that is the same as the first bias voltage based on the second control code when the actual number of pulses in the first output signal is the same as the target number of pulses, and configured to generate the second bias voltage different from the first bias voltage based on the second control code when the actual number of pulses in the first output signal is different from the target number of pulses, and

wherein the self-correcting control circuit is further configured to generate the second control code so as to make the bias voltage generation circuit generate the second bias voltage greater than the first bias voltage when the actual number of pulses is less the target number of pulses, and so as to make the bias voltage generation circuit generate the second bias voltage smaller than the first bias voltage when the actual number of pulses is greater than the target number of pulses.

2 . The spike neural network circuit of claim 1 , wherein the bias voltage generation circuit is further configured to generate a second bias voltage for a second synaptic column based on the first control code,

wherein the synaptic circuit further includes the second synaptic column configured to perform an operation of the input signal and a second weight signal based on the second bias voltage for the second synaptic column and to generate a second operation signal,

wherein the neuron circuit further includes a second neuron configured to generate a second output signal based on a comparison of the second operation signal and the threshold voltage,

wherein the spike comparison circuit further generates a second comparison signal corresponding to a difference between the second output signal and the reference number, and

wherein the self-correcting control circuit is further configured to generate a third control code based on the first control code and the second comparison signal.

3 . The spike neural network circuit of claim 2 , wherein the bias voltage generation circuit generates a third bias voltage obtained by correcting the first bias voltage for the first synaptic column, based on the second control code, and

wherein the bias voltage generation circuit is further configured to generate a fourth bias voltage obtained by correcting the second bias voltage for the second synaptic column, based on the third control code.

4 . The spike neural network circuit of claim 1 ,

wherein, when the actual number of pulses included in the first output signal is less than the target number of pulses indicated by the reference number, the bias voltage generation circuit generates the second bias voltage greater than the first bias voltage.

5 . The spike neural network circuit of claim 1 , wherein the first synaptic column includes a plurality of synapses,

wherein each of the plurality of synapses generates at least a portion of the first operation signal, based on the first bias voltage, the input signal, and a corresponding weight, and

wherein the neuron is configured to generate a pulse of the first output signal when a magnitude of the first operation signal is greater than or equal to the threshold voltage.

6 . The spike neural network circuit of claim 1 , wherein the spike comparison circuit includes:

a counter configured to generate a count signal indicative of the number of pulses included in the first output signal; and

a comparator configured to generate the first comparison signal based on the count signal and the reference number.

7 . The spike neural network circuit of claim 6 , wherein, when the count signal is greater than the reference number, the first comparison signal indicates a first operation value,

wherein, when the count signal is less than the reference number, the first comparison signal indicates a second operation value, and

wherein, when the count signal is equal to the reference number, the first comparison signal indicates a third operation value.

8 . The spike neural network circuit of claim 1 , wherein the second control code is a sum of the first control code and the first comparison signal.

9 . The spike neural network circuit of claim 1 , wherein an input signal is a plurality of input signals and the first synaptic column includes a plurality of synapses,

wherein the self-correcting control circuit is connected to the plurality of synapses to transmit the plurality of input signals to the plurality of synapses, respectively.

10 . The spike neural network circuit of claim 1 , wherein the bias voltage generation circuit includes a voltage dividing circuit configured to generate the first bias voltage based on the second control code, and

wherein the voltage dividing circuit includes a plurality of first transistors connected to a plurality of second transistors, respectively, the plurality of first transistors having widths different from each other, each of the plurality of second transistors being configured to be turned on in response to the second control code to generate the first bias voltage.

11 . A method of operating a spike neural network circuit including a plurality of synaptic columns and a neuron circuit, the method comprising:

generating a first bias voltage corresponding to a first synaptic column among the plurality of synaptic columns, based on a first control code;

performing an operation on a first input signal and a first weight signal based on the first bias voltage and generating a first operation signal, by the first synaptic column;

comparing the first operation signal and a threshold voltage and generating a first output signal, by the neuron circuit;

generating a first comparison signal corresponding to a difference between an actual number of pulses included in the first output signal and a target number of pulses indicated by a reference number;

generating a second control code for correcting the first bias voltage, based on the first comparison signal and the first control code;

generating a second bias volage that is the same as the first bias voltage based on the second control code when the actual number of pulses in the first output signal is the same as the target number of pulses; and

generating the second bias voltage different from the first bias voltage based on the second control code when the actual number of pulses in the first output signal is different from the target number of pulses,

wherein the second bias voltage greater than the first bias voltage is generated when the actual number of pulses is less the target number of pulses, and the second bias voltage smaller than the first bias voltage is generated when the actual number of pulses is greater than the target number of pulses.

12 . The method of claim 11 , further comprising:

wherein, when the actual number of pulses included in the first output signal is less than the target number of pulses indicated by the reference number, the second bias voltage is greater than the first bias voltage.

13 . The method of claim 11 , further comprising:

generating a second bias voltage corresponding to a second synaptic column among the plurality of synaptic columns, based on the first control code;

performing an operation of the input signal and a first weight signal based on the second bias voltage corresponding to the second synaptic column, by the second synaptic column, and generating a second operation signal;

comparing the second operation signal and the threshold voltage and generating a second output signal, by the neuron circuit;

generating a second comparison signal corresponding to a difference between the second output signal and the reference number; and

generating a third control code for correcting the second bias voltage, based on the second comparison signal and the first control code.

Assignments (1)

Priority Claims (2)

Continuity (1)

References Cited (21)