Creating scanning plans for improving accuracy and resolution of optical wafer inspection
A circuit design may be partitioned into a set of regions. Regions in the set of regions that are substantially identical to one another may be identified and overlaps between the set of regions may be determined. A scanning plan may be created based on the set of regions, the regions in the set of regions that are substantially identical to one another, and the overlaps between the set of regions. The scanning plan may be provided to an OWI system which inspects a set of dies fabricated based on the circuit design. A scan result may be received from the OWI system based on inspecting a die in the set of dies. A defect location in the die may be identified based on the scan result and the scanning plan.
1 . A method, comprising:
partitioning a circuit design into a set of regions;
identifying regions in the set of regions that are substantially identical to one another;
determining overlaps between the set of regions;
creating a scanning plan based on the set of regions, the regions in the set of regions that are substantially identical to one another, and the overlaps between the set of regions;
providing the scanning plan to an optical wafer inspection (OWI) system which inspects a set of dies fabricated based on the circuit design;
receiving a scan result from the OWI system based on inspecting a die in the set of dies; and
identifying, by a processor, a defect location in the die based on the scan result and the scanning plan.
2 . The method of claim 1 , wherein the scanning plan instructs the OWI system to scan a first region and a second region which overlap with one another.
3 . The method of claim 2 , wherein the scan result comprises a first result based on scanning the first region and a second result based on scanning the second region.
4 . The method of claim 3 , wherein the defect location in the die is a portion of the first region which does not overlap with the second region when the first result indicates that the first region has a defect, and the second result indicates that the second region does not have a defect.
5 . The method of claim 3 , wherein the defect location in the die is a portion of the second region which does not overlap with the first region when the second result indicates that the second region has a defect, and the first result indicates that the first region does not have a defect.
6 . A non-transitory computer-readable medium comprising stored instructions, which when executed by a processor, cause the processor to:
partition a circuit design into a set of regions;
identify regions in the set of regions that are substantially identical to one another;
determine overlaps between the set of regions;
create a scanning plan based on the set of regions, the regions in the set of regions that are substantially identical to one another, and the overlaps between the set of regions;
provide the scanning plan to an optical wafer inspection (OWI) system which inspects a set of dies fabricated based on the circuit design;
receive a scan result from the OWI system based on inspecting a die in the set of dies; and
identify a defect location in the die based on the scan result and the scanning plan.
7 . The non-transitory computer-readable medium of claim 6 , wherein the scanning plan instructs the OWI system to scan a first region and a second region which overlap with one another.
8 . The non-transitory computer-readable medium of claim 7 , wherein the scan result comprises a first result based on scanning the first region and a second result based on scanning the second region.
9 . The non-transitory computer-readable medium of claim 8 , wherein the defect location in the die is a portion of the first region which does not overlap with the second region when the first result indicates that the first region has a defect, and the second result indicates that the second region does not have a defect.
10 . The non-transitory computer-readable medium of claim 8 , wherein the defect location in the die is a portion of the second region which does not overlap with the first region when the second result indicates that the second region has a defect, and the first result indicates that the first region does not have a defect.
11 . An apparatus, comprising:
a memory storing instructions; and
a processor, coupled with the memory and to execute the instructions, the instructions when executed causing the processor to:
partition a circuit design into a set of regions;
identify regions in the set of regions that are substantially identical to one another;
determine overlaps between the set of regions;
create a scanning plan based on the set of regions, the regions in the set of regions that are substantially identical to one another, and the overlaps between the set of regions stored in the database;
provide the scanning plan to an optical wafer inspection (OWI) system which inspects a set of dies fabricated based on the circuit design;
receive a scan result from the OWI system based on inspecting a die in the set of dies; and
identify a defect location in the die based on the scan result and the scanning plan.
12 . The apparatus of claim 11 , wherein the scanning plan instructs the OWI system to scan a first region and a second region which overlap with one another.
13 . The apparatus of claim 12 , wherein the scan result comprises a first result based on scanning the first region and a second result based on scanning the second region.
14 . The apparatus of claim 13 , wherein the defect location in the die is a portion of the first region which does not overlap with the second region when the first result indicates that the first region has a defect, and the second result indicates that the second region does not have a defect.
15 . The apparatus of claim 13 , wherein the defect location in the die is a portion of the second region which does not overlap with the first region when the second result indicates that the second region has a defect, and the first result indicates that the first region does not have a defect.