Semiconductor device

1 . A semiconductor device comprising:

a regulator circuit configured to regulate a voltage input from outside and output a regulated voltage;

a charge pump circuit configured to receive the regulated voltage as an input voltage, boost the input voltage, and output a boosted voltage; and

a control circuit configured to cause the regulator circuit to vary a voltage level of the regulated voltage based on voltage value information about the voltage input from the outside.

2 . The semiconductor device according to claim 1 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array.

3 . The semiconductor device according to claim 1 , wherein

the regulator circuit includes a variable resistor, and

the control circuit is configured to cause a resistance value of the variable resistor to be varied in accordance with the voltage value information, to cause the regulator circuit to vary the voltage level of the regulated voltage.

4 . The semiconductor device according to claim 1 , wherein

the charge pump circuit includes a plurality of charge pump units, and

the control circuit changes a number of steps of voltage boost by the charge pump units based on the voltage value information.

5 . The semiconductor device according to claim 4 , wherein

when the voltage input from the outside is a first voltage, the number of steps of voltage boost is a first value, and

when the voltage input from the outside is a second voltage higher than the first voltage, the number of steps of voltage boost is a second value smaller than the first value.

6 . The semiconductor device according to claim 4 , wherein the control circuit is configured to output a first digital signal that instructs the voltage level of the regulated voltage to the regulator circuit and a second digital signal that instructs the number of steps of voltage boost by the charge pump units to the charge pump circuit.

7 . The semiconductor device according to claim 1 , wherein the control circuit changes a ramp rate of voltage boost by the charge pump circuit based on the voltage value information.

8 . The semiconductor device according to claim 7 , wherein

when the voltage input from the outside is a first voltage, the ramp rate is a first ramp rate, and

when the voltage input from the outside is a second voltage higher than the first voltage, the ramp rate is a second ramp rate higher than the first ramp rate.

9 . The semiconductor device according to claim 1 , further comprising:

a voltage monitor circuit configured to measure the voltage level of the voltage input from the outside and output the measured voltage level as the voltage value information to the control circuit.

10 . The semiconductor device according to claim 1 , wherein the control circuit receives the voltage value information from an external power control circuit, which is external to the semiconductor device.

11 . The semiconductor device according to claim 1 , further comprising:

a first terminal that is connectable to a memory controller and through which a command is received,

wherein the voltage value information is included in the command received through the first terminal.

12 . The semiconductor device according to claim 1 , further comprising:

a temperature sensor,

wherein the control circuit is configured to cause the regulator circuit to vary the voltage level of the regulated voltage based on a temperature measured by the temperature sensor.

13 . The semiconductor device according to claim 1 , wherein

when the voltage input from the outside is a first voltage, the regulated voltage is at a first voltage level, and

when the voltage input from the outside is a second voltage higher than the first voltage, the regulated voltage is at a second voltage level higher than the first voltage level.

14 . The semiconductor device according to claim 1 , wherein

the voltage input from the outside is received at a second terminal,

when the voltage input from the outside is a first voltage, an operation current that flows through the second terminal during a predetermined operation is a first current value, and

when the voltage input from the outside is a second voltage higher than the first voltage, the operation current that flows through the second terminal during the predetermined operation is a second current value smaller than the first current value.

15 . A semiconductor device comprising:

a terminal that receives a voltage input from outside;

a regulator circuit configured to regulate the voltage input from outside and output a regulated voltage; and

a charge pump circuit configured to receive the regulated voltage as an input voltage, boost the input voltage, and output a boosted voltage, wherein

when the voltage input from the outside is a first voltage, an operation current that flows through the terminal during a predetermined operation is a first current value, and

when the voltage input from the outside is a second voltage higher than the first voltage, the operation current that flows through the terminal during the predetermined operation is a second current value smaller than the first current value.

16 . The semiconductor device according to claim 15 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array, and

the predetermined operation is with respect to the memory cell array, and a read pass voltage application operation in a read operation.

17 . The semiconductor device according to claim 15 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array, and

the predetermined operation is with respect to the memory cell array, and a program operation in a write operation.

18 . The semiconductor device according to claim 15 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array, and

the predetermined operation is with respect to the memory cell array, and a verification operation in a write operation.

19 . A semiconductor device comprising:

a first terminal that receives a command from a device external to the semiconductor device;

a second terminal through which a ready busy signal is output to the device external to the semiconductor device;

a regulator circuit configured to regulate a voltage input from outside and output a regulated voltage; and

a charge pump circuit configured to receive the regulated voltage as an input voltage, boost the input voltage, and output a boosted voltage, wherein

when the voltage input from the outside is a first voltage, the ready busy signal stays at a busy state for a first period of time in response to a predetermined command received by the first terminal, and

when the voltage input from the outside is a second voltage higher than the first voltage, the ready busy signal stays at the busy state for a second period of time shorter than the first period of time in response to the predetermined command received by the first terminal.

20 . The semiconductor device according to claim 19 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array, and

the predetermined command is a command to execute a write operation.

21 . The semiconductor device according to claim 19 , further comprising:

a memory cell array, wherein

the charge pump circuit is configured to output the boosted voltage to the memory cell array, and

the predetermined command is a command to execute a read operation.