Reverse conduction loss reduction circuit, semiconductor device, and switching power supply
A reverse conduction loss reduction circuit operates, when an enhancement-mode switching element having reverse conduction characteristics corresponding to a gate-source voltage is reverse-conducting, to raise the gate-source voltage of the switching element to a predetermined bias voltage.
1 . A semiconductor device comprising a reverse conduction loss reduction circuit, wherein the reverse conduction loss reduction circuit is configured to, when an enhancement-mode switching element having reverse conduction characteristics corresponding to a gate-source voltage is reverse-conducting, raise the gate-source voltage of the enhancement-mode switching element to a predetermined bias voltage,
the semiconductor device comprises, as the enhancement-mode switching element, a high-side switching element and a low-side switching element that are connected in series between an application terminal for a first voltage and an application terminal for a second voltage,
wherein the reverse conduction loss reduction circuit includes a low-side pre-on driver configured to, when the low-side switching element is reverse-conducting, raise the gate-source voltage of the low-side switching element to the predetermined bias voltage, and
the low-side pre-on driver is configured to, during an on-period of the high-side switching element, raise the gate-source voltage of the low-side switching element to the predetermined bias voltage.
2 . The semiconductor device according to claim 1 ,
wherein
the predetermined bias voltage is higher than 0 V but lower than an on-threshold voltage of the enhancement-mode switching element.
3 . A semiconductor device comprising a reverse conduction loss reduction circuit, wherein the reverse conduction loss reduction circuit is configured to, when an enhancement-mode switching element having reverse conduction characteristics corresponding to a gate-source voltage is reverse-conducting, raise the gate-source voltage of the enhancement-mode switching element to a predetermined bias voltage,
the semiconductor device comprises, as the enhancement-mode switching element, a high-side switching element and a low-side switching element that are connected in series between an application terminal for a first voltage and an application terminal for a second voltage,
the reverse conduction loss reduction circuit includes a low-side pre-on driver configured to, when the low-side switching element is reverse-conducting, raise the gate-source voltage of the low-side switching element to the predetermined bias voltage, and
the reverse conduction loss reduction circuit further includes a high-side pre-on driver configured to, when the high-side switching element is reverse-conducting, raise the gate-source voltage of the high-side switching element to the predetermined bias voltage.
4 . The semiconductor device according to claim 3 ,
wherein
the high-side pre-on driver is configured to, during an on-period of the low-side switching element, raise the gate-source voltage of the high-side switching element to the predetermined bias voltage.
5 . The semiconductor device according to claim 1 ,
wherein
the enhancement-mode switching element is a GaN device.
6 . A switching power supply comprising:
the semiconductor device according to claim 1 ; and
an output stage externally connected to the semiconductor device, the output stage being configured to generate a desired output voltage from an input voltage.