Adapting forward error correction (FEC) or link parameters for improved post-FEC performance
Technologies for optimizing post-FEC bit error rate performance of a Forward Error Correction (FEC) system are described. A controller is coupled to an FEC circuit and a receiver circuit. The controller receives FEC symbol error data from at least the receiver circuit or the FEC circuit and determines, using the FEC symbol error data, a post-FEC correlated performance metric indicative of an estimated post-FEC BER of the FEC circuit. The controller adjusts, based on the post-FEC correlated performance metric, at least one of a FEC parameter of the FEC circuit or a link parameter of the receiver circuit to decrease the estimated post-FEC BER. This improves the post-FEC BER performance of the FEC circuit.
1 . A communication system comprising:
a receiver circuit;
a Forward Error Correction (FEC) circuit operatively coupled to the receiver circuit; and
a controller operatively coupled to the receiver circuit and the FEC circuit, wherein the controller is to:
receive first FEC symbol error data from the receiver circuit;
receive second FEC symbol error data from the FEC circuit;
compare a first measured histogram based on the first FEC symbol error data against a first target histogram to generate a first difference metric;
compare a second measured histogram based on the second FEC symbol error data against a second target histogram to generate a second difference metric; and
adjust a link parameter of the receiver circuit based on the first difference metric and adjust an FEC parameter of the FEC circuit based on the second difference metric to reduce a post-FEC bit error rate (BER) of the FEC circuit.
2 . The communication system of claim 1 , wherein the controller is further to adjust the link parameter and the FEC parameter sequentially.
3 . The communication system of claim 1 , wherein the controller is further to adjust the link parameter and the FEC parameter jointly.
4 . The communication system of claim 1 , wherein:
the FEC circuit comprises:
an interleaver; and
a decoder;
the FEC parameter is an interleave factor of the interleaver; and
the controller, to adjust the FEC parameter, is to change the interleave factor from a first value to a second value.
5 . The communication system of claim 1 , wherein the receiver circuit comprises a serializer/deserializer (SerDes) circuit, wherein:
the SerDes circuit comprises a phase-locked loop (PLL);
the link parameter is a phase noise parameter of the PLL; and
the controller, to adjust the link parameter, is to change the phase noise parameter from a first value to a second value.
6 . The communication system of claim 1 , wherein the receiver circuit comprises a serializer/deserializer (SerDes) circuit, wherein:
the FEC circuit comprises an interleaver;
the SerDes circuit comprises a phase-locked loop (PLL);
the FEC parameter is an interleave factor of the interleaver;
the link parameter is a phase noise parameter of the PLL;
the controller, to adjust the FEC parameter, is to change the interleave factor from a first value to a second value; and
the controller, to adjust the link parameter, is to change the phase noise parameter from a third value to a fourth value.
7 . The communication system of claim 1 , further comprising:
a receiver comprising the receiver circuit, the FEC circuit, and the controller; and
a transmitter comprising a second FEC circuit, wherein the controller is further to send an indication to the second FEC circuit, the indication to adjust an FEC parameter of the second FEC circuit.
8 . The communication system of claim 1 , wherein:
the FEC circuit comprises:
a first interleaver;
a first decoder;
a second interleaver;
a second decoder;
the FEC parameter is a first interleave factor of the first interleaver, and the second interleaver comprises a second interleave factor; and
the controller, to adjust the FEC parameter, is to:
change the first interleave factor from a first value to a second value; and
change the second interleave factor from a third value to a fourth value.
9 . The communication system of claim 1 , wherein the second FEC symbol error data comprises a number of corrected FEC symbols per codeword received from a decoder of the FEC circuit, and wherein the controller is to:
generate a measured approximate FEC codeword histogram based on the number of corrected FEC symbols per codeword, wherein the measured approximate FEC codeword histogram is the second measured histogram.
10 . The communication system of claim 9 , wherein the measured approximate FEC codeword histogram is generated without transmitting a training pattern.
11 . A method comprising:
receiving first Forward Error Correction (FEC) symbol error data from a receiver circuit;
receiving second FEC symbol error data from an FEC system coupled to the receiver circuit;
comparing a first measured histogram based on the first FEC symbol error data against a first target histogram to generate a first difference metric;
comparing a second measured histogram based on the second FEC symbol error data against a second target histogram to generate a second difference metric; and
adjusting a link parameter of the receiver circuit based on the first difference metric and adjusting an FEC parameter of the FEC system based on the second difference metric to reduce a post-FEC bit error rate (BER) of the FEC system.
12 . The method of claim 11 , wherein adjusting the link parameter and adjusting the FEC parameter are performed sequentially.
13 . The method of claim 11 , wherein adjusting the link parameter and adjusting the FEC parameter are performed jointly.
14 . The method of claim 11 , wherein adjusting the FEC parameter comprises changing an interleave factor of an interleaver of the FEC system from a first value to a second value.
15 . The method of claim 11 , wherein adjusting the FEC parameter comprises:
changing a first interleave factor of a first interleaver of the FEC system from a first value to a second value; and
changing a second interleave factor of a second interleaver of the FEC system from a third value to a fourth value.
16 . The method of claim 11 , wherein the receiver circuit is a Serializer/Deserializer (SerDes) circuit, wherein adjusting the link parameter comprises changing a phase noise parameter of a phase-locked loop (PLL) of the SerDes circuit from a first value to a second value.
17 . The method of claim 11 , wherein the receiver circuit is a Serializer/Deserializer (SerDes) circuit, wherein adjusting the FEC parameter comprises changing an interleave factor of an interleaver of the FEC system from a first value to a second value; and wherein adjusting the link parameter comprises changing a phase noise parameter of a phase-locked loop (PLL) of the SerDes circuit from a third value to a fourth value.
18 . The method of claim 11 , wherein the second FEC symbol error data comprises a number of corrected FEC symbols per codeword received from a decoder of the FEC system, and wherein the method further comprises:
generating a measured approximate FEC codeword histogram based on the number of corrected FEC symbols per codeword, wherein the measured approximate FEC codeword histogram is the second measured histogram.
19 . The method of claim 18 , wherein the measured approximate FEC codeword histogram is generated without transmitting a training pattern.
20 . A communication system comprising:
a Serializer/Deserializer (SerDes) circuit coupled to a communication channel;
a Forward Error Correction (FEC) system operatively coupled to the SerDes circuit; and
a controller operatively coupled to the SerDes circuit and the FEC system, wherein the controller is to:
receive first FEC symbol error data from the SerDes circuit;
receive second FEC symbol error data from the FEC system;
compare a first measured histogram based on the first FEC symbol error data against a first target histogram to generate a first difference metric;
compare a second measured histogram based on the second FEC symbol error data against a second target histogram to generate a second difference metric; and
change one or more parameters of the FEC system and one or more parameters of the SerDes circuit.
21 . The communication system of claim 20 , wherein the controller is further to adjust the one or more parameters of the FEC system and the one or more parameters of the SerDes circuit sequentially.
22 . The communication system of claim 20 , wherein the controller is further to adjust the one or more parameters of the FEC system and the one or more parameters of the SerDes circuit jointly.
23 . The communication system of claim 20 , wherein:
the FEC system comprises:
an interleaver; and
a decoder;
the one or more parameters of the FEC system comprise an interleave factor of the interleaver; and
the controller, to change the one or more parameters of the FEC system, is to change the interleave factor from a first value to a second value.
24 . The communication system of claim 20 , wherein the FEC system comprises:
a first interleaver;
a first decoder;
a second interleaver;
a second decoder;
the one or more parameters of the FEC system comprise a first interleave factor of the first interleaver and a second interleave factor of the second interleaver; and
the controller, to change the one or more parameters of the FEC system, is to:
change the first interleave factor from a first value to a second value; and
change the second interleave factor from a third value to a fourth value.
25 . The communication system of claim 20 , wherein the second FEC symbol error data comprises a number of corrected FEC symbols per codeword received from a decoder of the FEC system, and wherein the controller is to:
generate a measured approximate FEC codeword histogram based on the number of corrected FEC symbols per codeword, wherein the measured approximate FEC codeword histogram is the second measured histogram.
26 . The communication system of claim 25 , wherein the measured approximate FEC codeword histogram is generated without transmitting a training pattern.