IP Library › Granted Patent US 12,581,832
Granted Patent B2
US 12,581,832 · App. 18/267,780 · Granted Mar 17, 2026

Display panel and motherboard structure, display device

Inventors: Junxiu Dai (Beijing, CN); Lu Bai (Beijing, CN); Yang Zhou (Beijing, CN); Yi Qu (Beijing, CN); Siyu Wang (Beijing, CN); Song Liu (Beijing, CN)
Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
H10K59/8722
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Quick Facts
Patent No.
US 12,581,832
App. No.
18/267,780
Granted
Mar 17, 2026
Kind
B2
Abstract

The present disclosure provides a display panel (PNL), a motherboard structure, and a display device, and belongs to the field of display technologies. The display panel (PNL) has a display area (AA) and a peripheral area (BB) surrounding the display area (AA); and the peripheral area (BB) has an inner cut line (ICUT) surrounding the display area (AA). The motherboard structure includes a plurality of display panels (PNL), and the motherboard structure has a main cut line (MCUT) between the display panels (PNL). An outer cut line (OCUT) is disposed in at least a partial area between the main cut line (MCUT) and the inner cut line (ICUT) of the display panel (PNL); an end of the outer cut line (OCUT) is intersected with the inner cut line (ICUT); and a second crack dam (DAM 2 ) is disposed between the outer cut line (OCUT) and the inner cut line (ICUT).

Claims (28)

1 . A display panel, comprising a display area and a peripheral area surrounding the display area; wherein the peripheral area comprises an inner cut line surrounding the display area and a first crack dam located at a side of the inner cut line close to the display area,

wherein the display panel further comprises an outer cut line located on a side of the inner cut line away from the display area in at least a partial area of the peripheral area; and an end of the outer cut line is intersected with the inner cut line; and

the display panel comprises a second crack dam between the outer cut line and the inner cut line.

2 . The display panel according to claim 1 , wherein the side of the inner cut line away from the display area is provided with an identification mark; and at least part of the identification mark is at least partially disposed within the outer cut line.

3 . The display panel according to claim 1 , wherein the side of the inner cut line away from the display area is provided with an identification mark; and at least part of the identification mark is located between the outer cut line and the inner cut line, and a width of a part of the outer cut line close to the identification mark is smaller than a width of a remaining part of the outer cut line.

4 . The display panel according to claim 2 , wherein the second crack dam is disposed between the identification mark and the inner cut line.

5 . The display panel according to claim 1 , wherein a plurality of second crack dams are provided; and a crack blocking groove is disposed between two adjacent second crack dams, and the crack blocking groove is filled with an organic material.

6 . The display panel according to claim 5 , wherein the display panel comprises an organic substrate, an inorganic material layer and an organic material layer sequentially stacked in an area where the second crack dams are located; and

a bottom of at least one crack blocking groove is located at the inorganic material layer.

7 . The display panel according to claim 5 , wherein the display panel comprises an organic substrate, an inorganic material layer and an organic material layer sequentially stacked in an area where the second crack dams are located; and

a bottom of at least one crack blocking groove is located at the organic substrate.

8 . The display panel according to claim 6 , wherein the inorganic material layer comprises an inorganic blocking layer, an inorganic buffer layer, a gate insulating layer and an interlayer dielectric layer sequentially stacked on a side of the organic substrate; and

a bottom of the crack blocking groove is located at the inorganic buffer layer, the inorganic blocking layer or the organic substrate.

9 . The display panel according to claim 1 , wherein a number of the second crack dams is in a range of 2-8.

10 . The display panel according to claim 1 , wherein a width of the second crack dam is in a range of 5-15 microns.

11 . The display panel according to claim 5 , wherein a width of the crack blocking groove is in a range of 5-10 microns.

12 . The display panel according to claim 5 , wherein a ratio of a width of the second crack dam to a width of the crack blocking groove is between 0.8 and 1.2.

13 . The display panel according to claim 1 , wherein the peripheral area comprises a first peripheral area, a second peripheral area, a third peripheral area and a fourth peripheral area that surround the display area and are sequentially coupled end to end; the first peripheral area is disposed opposite to the third peripheral area; and the first peripheral area comprises a bonding pad for bonding an external circuit; and

the outer cut line is disposed at the first peripheral area and/or the third peripheral area.

14 . The display panel according to claim 1 , wherein the display panel comprises a rounded corner; and at least one edge of the rounded corner is partially overlapped with the outer cut line.

15 . The display panel according to claim 1 , wherein a plurality of outer cut lines are provided and arranged in sequence along a direction away from the display area in at least a partial area; and

the second crack dam is disposed between an outer cut line closest to the display area and the inner cut line.

16 . The display panel according to claim 1 , wherein the display panel is provided with a crack detection trace in the peripheral area; and the crack detection trace is disposed between the first crack dam and the display area.

17 . A motherboard structure, comprising a plurality of display panels wherein each display panel comprises a display area and a peripheral area surrounding the display area; wherein the peripheral area comprises an inner cut line surrounding the display area and a first crack dam located at a side of the inner cut line close to the display area; and wherein the motherboard structure comprises a main cut line between the display panels; and

an outer cut line is disposed in at least a partial area between the main cut line and the inner cut line of the display panel; an end of the outer cut line is intersected with the inner cut line; and the second crack dam is disposed between the outer cut line and the inner cut line.

18 . A display device, comprising a display panel, wherein the display panel comprises a display area and a peripheral area surrounding the display area; wherein the peripheral area comprises an inner cut line surrounding the display area and a first crack dam located at a side of the inner cut line close to the display area,

wherein the display panel further comprises an outer cut line located on a side of the inner cut line away from the display area in at least a partial area of the peripheral area; and an end of the outer cut line is intersected with the inner cut line; and

the display panel comprises a second crack dam between the outer cut line and the inner cut line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2023
From: DAI, JUNXIU; BAI, LU; ZHOU, YANG; QU, YI; WANG, SIYU; LIU, SONG
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 063969/0001 →
Continuity (1)
Related Publication 20240423066A1 · Dec 19, 2024
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