Computing device with pixel unshuffle and pixel shuffle operations and computing method therefor
A computing device and an operation method thereof are disclosed. The method includes unshuffling first image data to generate input data, generating output data by implementing a neural network (NN) model provided the input data, and generating second image data by shuffling the output data.
1 . A processor-implemented method, the method comprising:
unshuffling first image data to generate input data;
generating output data by implementing a neural network (NN) model provided the input data;
generating second image data by shuffling the output data, and
performing a convolution operation in parallel with one of the unshuffling of the first data and the shuffling of the output data.
2 . The method of claim 1 ,
wherein the unshuffling is performed by a first processor of a computing device,
wherein the implementing of the NN model is performed by a different second processor of the computing device.
3 . The method of claim 2 , wherein the unshuffling comprises:
converting, using the first processor, first image data in a first format into image data in a second format; and
unshuffling, using the first processor, the image data in the second format.
4 . The method of claim 1 ,
wherein the implementing of the NN model is performed by a second processor of a computing device,
wherein the shuffling is performed by a different first processor of the computing device.
5 . The method of claim 1 , further comprising:
receiving state data of a computing device that includes a first processor and a different second processor; and
performing the unshuffling using a selected, based on the state data, one of the first processor and the second processor.
6 . The method of claim 1 , further comprising:
receiving state data of a computing device that includes a first processor and a different second processor; and
performing the shuffling using a selected, based on the state data, one of the first processor and the second processor.
7 . The method of claim 1 , wherein the first image data and the second image data are of a same size.
8 . The method of claim 1 , wherein the generating of the output data comprises:
converting a first NN model, to the NN model, to be operable in a mobile computing device.
9 . The method of claim 1 ,
wherein the unshuffling is performed based on a shuffle ratio, and
wherein the shuffling is performed based on the shuffle ratio.
10 . A non-transitory computer-readable storage medium storing instructions that, when executed by respective processors, cause the respective processors to perform the method of claim 1 .
11 . A processor-implemented method, the method comprising:
performing, using a first processor of a computing device, an unshuffle operation of a pixel unshuffle layer of a neural network (NN) model;
performing, using the first processor, a shuffle operation of a pixel shuffle layer of the NN model; and
performing, using a second processor, a convolution operation of the NN model,
wherein the convolution operation is performed in parallel with any one or any combination of the unshuffle operation and the shuffle operation.
12 . The method of claim 11 , wherein the unshuffle operation includes converting first image data in a first format into image data in a second format.
13 . The method of claim 11 , wherein input data of the pixel unshuffle layer and output data of the pixel shuffle layer are of a same size.
14 . The method of claim 11 , further comprising:
converting a first NN model to a convolution NN model to be operable in the computing device, and to be configured to perform the convolution operation of the NN model.
15 . The method of claim 14 , wherein the converting of the first NN model further comprises adding the pixel unshuffle layer and the pixel shuffle layer to the convolution NN model, with a result of the converting being the NN model.
16 . A non-transitory computer-readable storage medium storing instructions that, when executed by respective processors, cause the respective processors to perform the method of claim 11 .
17 . A computing device, the computing device comprising:
a first processor configured to perform an unshuffle operation of a pixel unshuffle layer of a neural network (NN) model, and configured to perform a shuffle operation of a pixel shuffle layer of the NN model; and
a second processor configured to perform a convolution operation of the NN model dependent on a result of the pixel unshuffle layer,
wherein a result of the pixel shuffle layer is dependent on a result of the convolution operation, and
wherein the computing device is configured to perform the convolution operation in parallel with any one or any combination of the unshuffle operation and the shuffle operation.
18 . The computing device of claim 17 , wherein, for the unshuffle operation, the first processor is configured to convert first image data in a first format into image data in a second format.
19 . The computing device of claim 17 , wherein input data of the pixel unshuffle layer and output data of the pixel shuffle layer are of a same size.
20 . The computing device of claim 17 , further comprising a memory storing instructions, which when executed by one or more processors of the computing device, configure one or more processors to convert a first NN model to a convolution NN model to be operable in the computing device, and to be configured to perform the convolution operation of the NN model.
21 . The computing device of claim 20 , wherein the conversion of the first NN model further comprises additions of the pixel unshuffle layer and the pixel shuffle layer to the convolution NN model, with a result of the conversion being the NN model.
22 . The computing device of claim 17 , wherein the unshuffle operation is performed based on a shuffle ratio, and the shuffle operation is performed based on the shuffle ratio.
23 . The computing device of claim 17 , further comprising a memory storing instructions, which when executed by one or more processors of the computing device configures a select one of the first processor and the second processor to respectively perform the unshuffle operation of the pixel unshuffle layer and/or the shuffle operation of the pixel shuffle layer, and configures the second processor to perform the convolution operation.