IP Library › Granted Patent US 12,588,195
Granted Patent B2
US 12,588,195 · App. 17/353,408 · Granted Mar 24, 2026

Semiconductor device and manufacturing method of semiconductor device

Inventor: Nam Jae Lee (Icheon-si, KR)
Assignee: SK hynix Inc.
H10B41/20H01L23/5283H10B41/10H10B43/10H10B43/20
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Quick Facts
Patent No.
US 12,588,195
App. No.
17/353,408
Granted
Mar 24, 2026
Kind
B2
Abstract

A semiconductor device includes: conductive layers and interlayer insulating layers, which are alternately stacked; a select conductor spaced apart from the conductive layers; cell plugs penetrating the conductive layers, the interlayer insulating layers, and the select conductor; and an auxiliary conductor in contact with the select conductor.

Claims (49)

1 . A semiconductor device comprising:

conductive layers and interlayer insulating layers, which are alternately stacked;

a select conductor spaced apart from the conductive layers, the select conductor having a top surface facing a direction opposite to a direction facing the conductive layers and a bottom surface opposite to the top surface;

outer cell plugs penetrating the conductive layers, the interlayer insulating layers, and the select conductor;

an outer auxiliary conductor surrounding the outer cell plugs, the outer auxiliary conductor being in contact with the select conductor; and

an insulating layer covering the select conductor and the outer auxiliary conductor,

wherein the outer auxiliary conductor includes round parts and connection parts,

wherein the round parts respectively surround the outer cell plugs,

wherein the connection parts connect the round parts adjacent to each other,

wherein the outer auxiliary conductor has an opening exposing the top surface of the select conductor between the round parts,

wherein the select conductor includes outer select protrusion parts interposed between the round parts and a stack structure including the conductive layers and the interlayer insulating layers, and

wherein the insulating layer extends to be in contact with sidewalls of the outer select protrusion parts and the top surface of the select conductor.

2 . The semiconductor device of claim 1 , wherein the round parts respectively surround portions of the outer cell plugs, the portions of the outer cell plugs protruding beyond the select conductor.

3 . The semiconductor device of claim 1 , wherein each of the round parts include a round base part disposed at the same level as the connection parts and a round protrusion part disposed at a level higher than that of the connection parts.

4 . The semiconductor device of claim 3 , wherein the round protrusion part extends from the round base part.

5 . The semiconductor device of claim 3 , wherein the round protrusion part includes a first part disposed at the same level as the select conductor and a second part disposed at a level higher than that of the select conductor.

6 . The semiconductor device of claim 3 , wherein the round protrusion part overlaps with the select conductor.

7 . The semiconductor device of claim 1 , wherein the select conductor further includes a select base part disposed at the same level as the connection parts, and

wherein the outer select protrusion parts are disposed at a level higher than that of the connection parts.

8 . The semiconductor device of claim 7 , wherein the outer select protrusion parts are respectively in contact with the round parts.

9 . The semiconductor device of claim 7 , wherein a sidewall of each of the connection parts is in contact with a sidewall of the select base part.

10 . The semiconductor device of claim 1 ,

wherein the outer auxiliary conductor includes a first conductive material and the select conductor includes a second conductive material, and

wherein the first conductive material is different from the second conductive material.

11 . The semiconductor device of claim 10 , wherein the outer auxiliary conductor includes titanium nitride.

12 . The semiconductor device of claim 11 , wherein the select conductor includes poly-silicon.

13 . A semiconductor device comprising:

conductive layers and interlayer insulating layers, which are alternately stacked;

a select conductor spaced apart from the conductive layers, the select conductor having a top surface facing a direction opposite to a direction facing the conductive layers and a bottom surface opposite to the top surface;

inner cell plugs penetrating the conductive layers, the interlayer insulating layers, and the select conductor;

inner auxiliary conductors in contact with the select conductor, the inner auxiliary conductors being spaced apart from each other to expose the top surface of the select conductor between the inner auxiliary conductors; and

an insulating layer covering the select conductor and the inner auxiliary conductor,

wherein the inner auxiliary conductors respectively surround the inner cell plugs,

wherein the inner auxiliary conductors are disposed at a level higher than that of the select conductor,

wherein the select conductor includes inner select protrusion parts interposed between the inner auxiliary conductors and a stack structure including the conductive layers and the interlayer insulating layers, and

wherein the insulating layer extends to be in contact with sidewalls of the inner select protrusion parts and the top surface of the select conductor.

14 . The semiconductor device of claim 13 , wherein the select conductor further includes a select base part, and

wherein the inner select protrusion parts extends from the select base part.

15 . The semiconductor device of claim 14 , wherein a top surface of each of the inner select protrusion parts forms a common surface with a bottom surface of each of the inner auxiliary conductors.

16 . The semiconductor device of claim 14 , wherein the inner select protrusion parts respectively surround portions of the inner cell plugs protruding beyond the select base part.

17 . The semiconductor device of claim 13 , further comprising:

outer cell plugs penetrating the conductive layers, the interlayer insulating layers, and the select conductor; and

an outer auxiliary conductor surrounding the outer cell plugs.

18 . The semiconductor device of claim 17 , wherein each of the inner auxiliary conductors and the outer auxiliary conductor include substantially the same material and the select conductor includes a material different from a material of each of the inner auxiliary conductors.

19 . The semiconductor device of claim 13 ,

wherein each of the inner auxiliary conductors includes a first conductive material and the select conductor includes a second conductive material, and

wherein the first conductive material is different from the second conductive material.

20 . The semiconductor device of claim 19 , wherein each of the inner auxiliary conductor includes titanium nitride.

21 . The semiconductor device of claim 20 , wherein the select conductor includes poly-silicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2021
From: LEE, NAM JAE
To: SK HYNIX INC.
Reel/Frame 056607/0726 →
Priority Claims (1)
KR 10-2020-0172729 · Dec 10, 2020 · national
Continuity (1)
Related Publication 20220189980A1 · Jun 16, 2022
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