IP Library › Granted Patent US 12,588,228
Granted Patent B2
US 12,588,228 · App. 18/463,340 · Granted Mar 24, 2026

Semiconductor device

Inventor: Daiki Yoshikawa (Kanazawa, JP)
Assignees: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
H10D12/411H10D8/00H10D62/142
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Quick Facts
Patent No.
US 12,588,228
App. No.
18/463,340
Granted
Mar 24, 2026
Kind
B2
Abstract

According to one embodiment, a semiconductor device includes first and second electrodes, and first and second regions. The second electrode includes a contact part protruding toward the first electrode. The first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type including a first part and a second part, a gate electrode, a fourth semiconductor region of the first conductivity type, and a fifth semiconductor region of the second conductivity type. The third semiconductor region includes a first part and a second part. The fourth semiconductor region is arranged with the first part in a third direction. The fifth semiconductor region is located on the third semiconductor region, contacts the contact part in the second direction, and is arranged with the second part in the third direction.

Claims (35)

1 . A semiconductor device, comprising:

a first electrode;

a second electrode separated from the first electrode, the second electrode including a contact part protruding toward the first electrode;

a first region located on a portion of the first electrode and positioned between the first electrode and the second electrode, the first region including

a first semiconductor region of a first conductivity type,

a second semiconductor region of a second conductivity type, a portion of the second semiconductor region being located on the first semiconductor region, and

a third semiconductor region located on the portion of the second semiconductor region, the third semiconductor region being of the first conductivity type, the third semiconductor region including a first part and a second part,

a gate electrode facing the third semiconductor region via a gate insulating layer in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the second electrode,

a fourth semiconductor region located between the third semiconductor region and the contact part in the first direction, the fourth semiconductor region being of the first conductivity type, a first-conductivity-type impurity concentration of the fourth semiconductor region being greater than a first-conductivity-type impurity concentration of the third semiconductor region, the fourth semiconductor region being arranged with the first part in a third direction perpendicular to the first and second directions, and

a fifth semiconductor region located on the third semiconductor region, the fifth semiconductor region being of the second conductivity type, the fifth semiconductor region contacting the contact part in the second direction, the fifth semiconductor region being arranged with the second part in the third direction; and

a second region located on an other portion of the first electrode and positioned between the first electrode and the second electrode, the second region including

a sixth semiconductor region of the second conductivity type, the sixth semiconductor region having a higher second-conductivity-type impurity concentration than the second semiconductor region,

an other portion of the second semiconductor region located on the sixth semiconductor region, and

a seventh semiconductor region located on the other portion of the second semiconductor region, the seventh semiconductor region being of the first conductivity type.

2 . The device according to claim 1 , wherein

a position in the third direction of at least a portion of the fourth semiconductor region is the same as a position in the third direction of at least a portion of the fifth semiconductor region.

3 . The device according to claim 1 , wherein

a length in the third direction of the fourth semiconductor region is greater than a length in the third direction of the fifth semiconductor region.

4 . The device according to claim 1 , wherein

the first part and the fourth semiconductor region are alternately arranged in the third direction, and

the second part and the fifth semiconductor region are alternately arranged in the third direction.

5 . The device according to claim 4 , wherein

a distance in the third direction between adjacent fourth semiconductor regions among the fourth semiconductor regions is greater than a length in the third direction of one of the adjacent fourth semiconductor regions, and

a distance in the third direction between adjacent fifth semiconductor regions among the fifth semiconductor regions is greater than a length in the third direction of one of the adjacent fifth semiconductor regions.

6 . The device according to claim 4 , wherein

a plurality of the first parts and a plurality of the fourth semiconductor regions contact the contact part in the first direction, and

a plurality of the second parts and a plurality of the fifth semiconductor regions contact the contact part in the second direction.

7 . The device according to claim 4 , wherein

a plurality of the contact parts is arranged in the third direction, and

the plurality of contact parts is located respectively on a plurality of the fourth semiconductor regions.

8 . The device according to claim 1 , wherein

the third semiconductor region includes a first subregion, and a second subregion arranged with the first subregion in the third direction,

the fourth semiconductor region and the fifth semiconductor region are located on the first subregion,

the first part and the second part are located in the second subregion, and

a first-conductivity-type impurity concentration of the second subregion is less than a first-conductivity-type impurity concentration of the first subregion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2023
From: YOSHIKAWA, DAIKI
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 065009/0511 →
Priority Claims (1)
JP 2023-046945 · Mar 23, 2023 · national
Continuity (1)
Related Publication 20240322020A1 · Sep 26, 2024
References Cited (8)
US 20220181471A1 · Miyata et al. · 2022 [cited by applicant]
US 20220415884A1 · Toriyama et al. · 2022 [cited by applicant]
US 20230299077A1 · Muramatsu · 2023 [cited by examiner]
US 20240405110A1 · Osawa · 2024 [cited by examiner]
JP 2021040071A · 2021 [cited by applicant]
JP 2021144998A · 2021 [cited by applicant]
JP 2022015194A · 2022 [cited by applicant]
JP 2022181471A · 2022 [cited by applicant]