Semiconductor device processing data and operation method of the semiconductor device
A semiconductor device may include a memory configured to store data, a controller configured to monitor input/output data of the memory, and upon receiving a computing command and an address information from a host, determine computing on first data among the input/output data based on the computing command and the address information, and a computing engine configured to perform computing on the first data in response to the determining of the controller, where the address information instructs an address of the memory by using a physical region page (PRP) or a scatter gather list (SGL).
1 . A semiconductor device, comprising: a memory configured to store data; a controller configured to monitor input/output data of the memory, determine computing to be performed on first data among the input/output data in response to receiving, from a host, a computing command and address information indicating an address of the memory using at least one of a physical region page or a scatter gather list, wherein the computing is determined based on the address information matching a device physical address of the first data; and a computing engine processing circuitry configured to perform the determined computing on the first data.
2 . The semiconductor device of claim 1 , wherein the controller is configured to transfer computing instructions corresponding to the computing command to the processing circuitry based on the device physical address of the first data matching the address information.
3 . The semiconductor device of claim 2 , wherein the controller is configured to
manage the address information using an index, and
determine whether the device physical address and an address of a current index in the address information match each other.
4 . The semiconductor device of claim 3 , wherein the controller is configured to increase a value of the current index when the address of the current index is determined to match the device physical address.
5 . The semiconductor device of claim 2 , wherein the controller is configured to snoop the input/output data to perform computation based on the computing command.
6 . The semiconductor device of claim 1 , wherein the controller is configured to convert a host physical address to a device physical address using a mapping table in response to receiving the host physical address from the host, and to monitor the input/output data based on the device physical address.
7 . The semiconductor device of claim 6 , further comprising:
a static random access memory storing the mapping table and the address information.
8 . The semiconductor device of claim 1 , wherein the controller is configured to receive a plurality of address information from the host, and manage the plurality of address information using individual indices.
9 . The semiconductor device of claim 1 , wherein, the processing circuitry further is configured to perform an exclusive OR computation using the first data when the computing command is one of a parity generation or a data rebuild.
10 . The semiconductor device of claim 1 , wherein the processing circuitry is further configured to transfer a computation result of the computing to the host.
11 . An operation method of a semiconductor device, comprising:
receiving a command and address information of at least one of a physical region page or a scatter gather list from a host;
monitoring input/output data;
determining that the address information and a device physical address of first data among the input/output data match each other; and
performing computing on the first data according to the command, based on the device physical address and the address information matching each other.