IP Library Granted Patent US 12,602,182
Granted Patent B2
US 12,602,182 · App. 18/807,445 · Granted Apr 14, 2026

User configurable SLC memory size

Inventors: Chace A. Clark (Hillsboro, OR); Francis Corrado (Redwood City, CA)
Assignee: SK hynix NAND Product Solutions Corp.
G06F3/064G06F3/0605G06F3/0629G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 12,602,182
App. No.
18/807,445
Granted
Apr 14, 2026
Kind
B2
Abstract

An embodiment of an electronic apparatus may include one or more substrates; and a controller coupled to the one or more substrates, the controller including logic to control access to a NAND-based storage media that includes a first cell region with a first number of levels and a second region with a second number of levels that is different from the first number of levels, determine logical block address locations that correspond to a user configurable capacity placeholder, and adjust respective sizes of the first cell region and the second cell region at runtime based on the logical block address locations. Other embodiments are disclosed and claimed.

Claims (46)

1 . An electronic apparatus, comprising:

NAND-based storage media that includes a first cell region with a first number of levels and a second cell region with a second number of levels that is different from the first number of levels; and

a controller coupled to the NAND-based storage media, wherein the controller is configured to at least:

determine logical block address locations that correspond to a capacity placeholder, and

adjust respective sizes of the first cell region and the second cell region based on the logical block address locations.

2 . The apparatus of claim 1 , wherein the controller is further configured to:

enable a feature for user configuration of a size of the first cell region in response to a command.

3 . The apparatus of claim 2 , wherein the controller is further configured to:

reserve a range of logical block addresses for management of conversions of capacity between the first cell region and the second cell region.

4 . The apparatus of claim 2 , wherein the controller is further configured to:

preserve user data on the NAND-based storage media when the feature is enabled.

5 . The apparatus of claim 4 , wherein the controller is further configured to:

convert a block of the second cell region into a converted block of the first cell region.

6 . The apparatus of claim 5 , wherein the controller is further configured to:

move data from the second cell region into the converted block of the first cell region.

7 . The apparatus of claim 1 , wherein the controller and the NAND-based storage media are incorporated in a solid-state drive.

8 . An electronic storage system, comprising:

non-volatile storage media that includes a first cell region with a first number of levels and a second cell region with a second number of levels that is different from the first number of levels; and

a controller coupled to the non-volatile storage media, wherein the controller is configured to at least:

determine logical block address locations that correspond to a capacity placeholder, and

adjust respective sizes of the first cell region and the second cell region based on the logical block address locations.

9 . The system of claim 8 , wherein the controller is further configured to:

enable a feature for user configuration of a size of the first cell region in response to a command.

10 . The system of claim 9 , wherein the controller is further configured to:

reserve a range of logical block addresses for management of conversions of capacity between the first cell region and the second cell region.

11 . The system of claim 9 , wherein the controller is further configured to:

preserve user data on the non-volatile storage media when the feature is enabled.

12 . The system of claim 11 , wherein the controller is further configured to:

convert a block of the second cell region into a block of the first cell region.

13 . The system of claim 12 , wherein the controller is further configured to:

move data from the second cell region into the converted block of the first cell region.

14 . The system of claim 8 , wherein the controller and the non-volatile storage media are incorporated in a solid-state drive.

15 . A method of controlling storage, comprising:

determining logical block address locations that correspond to a capacity placeholder, and

adjusting respective sizes of a first cell region and a second cell region based on the logical block address locations,

wherein the first cell region and the second cell region are included in non-volatile storage media, the first cell region has a first number of levels, and the second cell region has a second number of levels that is different from the first number of levels.

16 . The method of claim 15 , further comprising:

enabling a feature for user configuration of a size of the first cell region in response to a command.

17 . The method of claim 16 , further comprising:

reserving a range of logical block addresses for management of conversions of capacity between the first cell region and the second cell region.

18 . The method of claim 16 , further comprising:

preserving user data on the non-volatile storage media when the feature is enabled.

19 . The method of claim 18 , further comprising:

converting a block of the second cell region into a block of the first cell region.

20 . The method of claim 19 , further comprising:

moving data from the second cell region into the converted block of the first cell region.

Continuity (2)
Continuation 17231893 · Apr 15, 2021
Related Publication 20240402930A1 · Dec 5, 2024
References Cited (20)
US 10229735B1 · Natarajan et al. · 2019 [cited by applicant]
US 12093547B2 · Clark · 2024 [cited by examiner]
US 20080112238A1 · Kim · 2008 [cited by examiner]
US 20160062660A1 · Kunimatsu et al. · 2016 [cited by applicant]
US 20160062681A1 · Samuels · 2016 [cited by examiner]
US 20160085897A1 · Jeong · 2016 [cited by applicant]
US 20180081594A1 · Jung et al. · 2018 [cited by applicant]
US 20190043604A1 · Baca et al. · 2019 [cited by applicant]
US 20190056886A1 · Nagarajan · 2019 [cited by examiner]
US 20190332322A1 · Kwon et al. · 2019 [cited by applicant]
US 20200167089A1 · Natarajan · 2020 [cited by examiner]
US 20210232313A1 · Clark et al. · 2021 [cited by applicant]
JP 2015215678 · 2015 [cited by applicant]
JP 2015228197 · 2015 [cited by applicant]
KR 1020150044264 · 2020 [cited by applicant]
Decision for Grant dated May 13, 2025 in JP Patent Application No. 2023-562554, pp. 1-2. [cited by applicant]
International Search Report and Written Opinion dated Aug. 3, 2022 in International Patent Application No. PCT/US2022/024865, pp. 1-7. [cited by applicant]
Notice of Allowance dated May 17, 2024 in U.S. Appl. No. 17/231,893, pp. 1-14. [cited by applicant]
Notice of Allowance dated Dec. 22, 2025 in KR Patent Application No. 10-2023-7039368, pp. 1-8. [cited by applicant]
Office Action dated May 13, 2025 in KR Patent Application No. 10-2023-7039368, pp. 1-3. [cited by applicant]