Hardware resource allocation system for allocating resources to threads
In various embodiments, a resource allocation management circuit may allocate a plurality of different types of hardware resources (e.g., different types of registers) to a plurality of threads. The different types of hardware resources may correspond to a plurality of hardware resource allocation circuits. The resource allocation management circuit may track allocation of the hardware resources to the threads using state identification values of the threads. In response to determining that fewer than a respective requested number of one or more types of the hardware resources are available, the resource allocation management circuit may identify one or more threads for deallocation. As a result, the hardware resource allocation system may allocate hardware resources to threads more efficiently (e.g., may deallocate hardware resources allocated to fewer threads), as compared to a hardware resource allocation system that does not track allocation of hardware resources to threads using state identification values.
1 . An apparatus, comprising:
a plurality of hardware resource allocation circuits configured to collectively allocate different types of hardware resources to threads;
a memory device configured to store a thread allocation map that indicates amounts of the different types of hardware resources allocated to a given thread of the threads;
a resource allocation management circuit coupled to the memory device and configured to:
receive one or more resource allocation requests to allocate specified amounts of the different types of hardware resources to a first thread to utilize when executed;
identify, based on the thread allocation map, a second thread for deallocation that has been allocated hardware resources from multiple of the different types of hardware resources;
send deallocation requests to the plurality of hardware resource allocation circuits to deallocate a set of hardware resources allocated to the second thread;
send allocation requests to the plurality of hardware resource allocation circuits to allocate, using at least a portion of the set of deallocated hardware resources, the specified amounts of the different types of hardware resources to the first thread; and
update the thread allocation map to indicate an allocation of the specified amounts of the different types of hardware resources to the first thread,
wherein a particular one of the plurality of hardware resource allocation circuits is configured to:
receive an allocation request of the allocation requests from the resource allocation management circuit;
update a resource allocation map managed by the particular hardware resource allocation circuit to allocate, to the first thread, a number of portions of a hardware resource managed by the particular hardware resource allocation circuit; and
return an allocation response to the resource allocation management circuit; and
wherein the apparatus further comprises a first pipeline circuit configured to execute the first thread to utilize the allocated specified amounts of the different types of hardware resources.
2 . The apparatus of claim 1 , wherein the resource allocation management circuit is configured to identify the second thread based on an indication in the thread allocation map that the second thread is associated with an inactive state.
3 . The apparatus of claim 1 , further comprising:
a first data master that corresponds to the first pipeline circuit and is configured to manage the first thread; and
a second data master that corresponds to a second pipeline circuit and is configured to manage the second thread.
4 . The apparatus of claim 3 , wherein the resource allocation management circuit is configured to identify the second thread based on an indication in the thread allocation map that the second thread is associated with a different data master than the first thread.
5 . The apparatus of claim 3 , wherein the resource allocation management circuit is configured to identify the second thread based on a replacement scheme that corresponds to the second data master.
6 . The apparatus of claim 3 , wherein the resource allocation management circuit is configured to reserve amounts of the different types of hardware resources for the first data master such that the reserved amounts are not available for servicing resource allocation requests from the second data master.
7 . The apparatus of claim 3 , wherein the resource allocation management circuit is configured to prioritize resource allocation requests from the first data master over the second data master.
8 . The apparatus of claim 1 , wherein the resource allocation management circuit is configured to return, to a requestor of the one or more resource allocation requests, a state identification value of the first thread that is usable to access information about the first thread that is stored in the thread allocation map.
9 . The apparatus of claim 1 , wherein the resource allocation management circuit is configured to delete an entry of the thread allocation map that corresponds to the second thread.
10 . A method, comprising:
maintaining, by a resource allocation management circuit of a processor, a set of thread allocation maps that indicate amounts of different types of hardware resources allocated to a thread;
receiving, by the resource allocation management circuit, one or more resource allocation requests to allocate specified amounts of the different types of hardware resources to a first thread to utilize when executed;
based on the maintained set of thread allocation maps, the resource allocation management circuit identifying a second thread for deallocation that has been allocated hardware resources corresponding to at least one of the different types of hardware resources;
sending, by the resource allocation management circuit, deallocation requests to deallocate a set of hardware resources corresponding to the at least one different type of hardware resource that are allocated to the second thread;
sending, by the resource allocation management circuit, allocation requests to allocate, using at least a portion of the set of deallocated hardware resources, the specified amounts of the different types of hardware resources to the first thread, wherein at least one of the allocation requests is sent to a hardware resource allocation circuit that is configured to:
update a resource allocation map managed by the hardware resource allocation circuit to allocate, to the first thread, a number of portions of a hardware resource managed by the hardware resource allocation circuit; and
return an allocation response to the resource allocation management circuit;
updating, by the resource allocation management circuit, the set of thread allocation maps to indicate an allocation of the specified amounts of the different types of hardware resources to the first thread; and
executing, by a pipeline circuit of the processor, the first thread to utilize the allocated specified amounts of the different types of hardware resources.
11 . The method of claim 10 , wherein the set of thread allocation maps includes at least two thread allocation maps that each correspond to a respective one of the different types of hardware resources.
12 . The method of claim 10 , wherein the set of thread allocation maps indicates an execution state of a thread, wherein the second thread is selected based on an indication that the second thread is in an inactive state.
13 . The method of claim 10 , further comprising:
generating, by the resource allocation management circuit, a state identification value that corresponds to the first thread, wherein information about the first thread that is stored in the set of thread allocation maps is accessible using the state identification value.
14 . The method of claim 13 , wherein the state identification value is included in the allocation requests sent to allocate the specified amounts of the different types of hardware resources.
15 . A non-transitory computer readable storage medium having stored thereon design information that specifies a circuit design in a format recognized by a fabrication system that is configured to use the design information to fabricate a hardware integrated circuit that includes:
a plurality of hardware resource allocation circuits configured to collectively allocate different types of hardware resources to threads;
a memory device configured to store a thread allocation map that indicates amounts of the different types of hardware resource allocated to a given thread of the threads;
a resource allocation management circuit coupled to the memory device and configured to:
receive a resource allocation request to allocate a specified amount of a hardware resource of the different types of hardware resources to a first thread to utilize when executed;
identify, based on the thread allocation map, a second thread for deallocation that has been allocated an amount of the hardware resource;
send a deallocation request to a hardware resource allocation circuit of the plurality of hardware resource allocation circuits to deallocate the amount of the hardware resource that has been allocated to the second thread;
send an allocation request to the hardware resource allocation circuit to allocate the specified amount of the hardware resource to the first thread; and
update the thread allocation map to indicate an allocation of the specified amount of the hardware resource to the first thread,
wherein the hardware resource allocation circuit is configured to:
update a resource allocation map managed by the hardware resource allocation circuit to allocate, to the first thread, a number of portions of the hardware resource managed by the hardware resource allocation circuit; and
return an allocation response to the resource allocation management circuit that the specified amount of the hardware resource has been allocated; and
wherein the hardware integrated circuit further includes a pipeline circuit configured to execute the first thread to utilize the allocated specified amount of the hardware resource.
16 . The non-transitory computer readable storage medium of claim 15 , wherein the resource allocation management circuit is configured to identify the second thread based on an indication in the thread allocation map that the second thread is associated with a particular state.
17 . The non-transitory computer readable storage medium of claim 15 , wherein the resource allocation management circuit is configured to identify the second thread based on an indication in the thread allocation map that the second thread is associated with a different data master than the first thread.
18 . The non-transitory computer readable storage medium of claim 15 , wherein the hardware resource allocation circuit is configured to delete an entry of the resource allocation map that corresponds to the second thread.
19 . The non-transitory computer readable storage medium of claim 15 , wherein the resource allocation management circuit is configured to select the second thread in response to a determination that the second thread is a least recently used thread having an inactive execution state.
20 . The non-transitory computer readable storage medium of claim 15 , wherein the different types of hardware resources correspond to a uniform memory device, a compute memory device, and a texture memory device.