N-type 2D transition metal dichalcogenide (TMD) transistor
A transition metal dichalcogenide (TMD) transistor includes a substrate, an n-type two-dimensional (2D) TMD layer, a metal source electrode, a metal drain electrode, and a gate dielectric. The substrate has a top portion that is an insulating layer, and the n-type 2D TMD layer is on the insulating layer. The metal source electrode, the metal drain electrode, and the gate dielectric are on the n-type 2D TMD layer. The metal gate electrode is on top of the gate dielectric and is between the metal source electrode and the metal drain electrode.
1 . A transition metal dichalcogenide (TMD) transistor, comprising:
a substrate comprising a semiconductor material and having a top portion that is an insulating layer;
an n-type two-dimensional (2D) TMD layer on the insulating layer, the n-type 2D TMD layer having a first side adjacent to the substrate and a second side opposite the first side;
a metal source electrode, a metal drain electrode, and a gate dielectric on the second side of the n-type 2D TMD layer; and
a metal gate electrode on top of the gate dielectric, wherein the metal gate electrode is between the metal source electrode and the metal drain electrode; wherein
the substrate comprises an electrical device in the semiconductor material within the substrate.
2 . The TMD transistor according to claim 1 wherein the electrical device comprises a resistor, a capacitor, an inductor, a diode, a transistor, or a combination thereof.
3 . The TMD transistor according to claim 1 wherein the n-type 2D TMD layer comprises MoS 2 or WS 2 .
4 . The TMD transistor according to claim 1 wherein the n-type 2D TMD layer has a thickness in the range of 1 to 3 monolayers.
5 . The TMD transistor according to claim 1 wherein the n-type 2D TMD layer is doped with aluminum.
6 . The TMD transistor according to claim 1 wherein the metal source electrode and the metal drain electrode each comprise Sc or Ni, or a combination thereof.
7 . The TMD transistor according to claim 1 wherein a lower portion of the metal source electrode and of the metal drain electrode comprises aluminum.
8 . The TMD transistor according to claim 1 wherein the gate dielectric comprises an insulator selected from the group consisting of aluminum oxide, hafnium oxide, zirconium oxide, tantalum oxide, silicon oxide, silicon oxynitride, and any combination thereof.
9 . The TMD transistor according to claim 1 wherein the gate dielectric comprises aluminum oxide, and the aluminum oxide is in contact with the n-type 2D TMD layer.
10 . The TMD transistor according to claim 1 wherein the gate dielectric extends over a region of the n-type 2D TMD layer between the metal source electrode and the metal drain electrode and along sidewalls of the metal source electrode and the metal drain electrode.
11 . The TMD transistor according to claim 1 wherein the metal gate electrode contains Ni, Ti, or a combination of Ni and Ti.
12 . The TMD transistor according to claim 1 wherein a lower portion of the metal source electrode and of the metal drain electrode comprises aluminum.
13 . A method for forming a transition metal dichalcogenide (TMD) transistor comprising:
providing a substrate comprising a semiconductor material and having a top layer that is insulating;
forming a two-dimensional (2D) TMD layer on the substrate, the n-type 2D TMD layer having a first side adjacent to the substrate and a second side opposite the first side;
forming a metal source electrode and a metal drain electrode on the second side of the 2D TMD layer;
forming a gate dielectric on the second side of the 2D TMD layer; and
forming a metal gate electrode on the gate dielectric, wherein the metal gate electrode is between the metal source electrode and the metal drain electrode; wherein
the substrate comprises an electrical device in the semiconductor material within the substrate.
14 . The method according to claim 13 wherein the electrical device comprises a resistor, a capacitor, an inductor, a diode, a transistor, or a combination thereof.
15 . The method according to claim 13 wherein the 2D TMD layer comprises MoS 2 or WS 2 .
16 . The method according to claim 13 wherein the 2D TMD layer has a thickness in the range of 1 to 3 monolayers.
17 . The method according to claim 13 wherein the metal source electrode and the metal drain electrode each comprise Sc or Ni, or a combination thereof.