Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate and a bit line structure disposed on the substrate. The bit line structure includes a first conductive structure and a second conductive structure, in which a material of the first conductive structure includes polysilicon. The second conductive structure is disposed in direct contact on the first conductive structure, in which a reactivity of a material of the second conductive structure to oxygen is larger than a reactivity of tungsten to oxygen.
1 . A semiconductor device, comprising:
a substrate; and
a bit line structure disposed on the substrate and comprising:
a first conductive structure, wherein a material of the first conductive structure comprises polysilicon; and
a second conductive structure disposed in direct contact on the first conductive structure, wherein a reactivity of a material of the second conductive structure to oxygen is larger than a reactivity of tungsten to oxygen.
2 . The semiconductor device of claim 1 , wherein a vertical length of the first conductive structure is larger than a vertical length of the second conductive structure.
3 . The semiconductor device of claim 1 , wherein the bit line structure further comprises:
an insulating structure disposed in direct contact on the second conductive structure.
4 . The semiconductor device of claim 3 , wherein a material of the insulating structure comprises silicon nitride.
5 . The semiconductor device of claim 3 , wherein a first sidewall of the first conductive structure and a second sidewall of the second conductive structure are substantially aligned with a third sidewall of the insulating structure.
6 . The semiconductor device of claim 1 , further comprising:
a nitride spacer layer covering the second conductive structure and in direct contact with an entire sidewall of the second conductive structure.
7 . A manufacturing method of a semiconductor device, comprising:
disposing a first conductive layer on a substrate;
disposing a second conductive layer on the first conductive layer;
patterning the first conductive layer and the second conductive layer to form a first conductive structure and a second conductive structure by a dry etching, wherein a residue is formed on the second conductive structure; and
performing an ashing process to remove the residue, wherein a gas for generating a plasma used in the ashing process is an oxygen-free gas comprising a hydrogen-containing gas and a nitrogen-containing gas, a hydrogen-containing and nitrogen-containing gas, or a combination thereof.
8 . The manufacturing method of the semiconductor device of claim 7 , wherein the hydrogen-containing and nitrogen-containing gas is diimide.
9 . The manufacturing method of the semiconductor device of claim 7 , wherein the hydrogen-containing and nitrogen-containing gas is ammonia.
10 . The manufacturing method of the semiconductor device of claim 7 , wherein the hydrogen-containing and nitrogen-containing gas is diimide and ammonia.
11 . The manufacturing method of the semiconductor device of claim 7 , wherein the hydrogen-containing gas is hydrogen gas, and the nitrogen-containing gas is nitrogen gas.
12 . The manufacturing method of the semiconductor device of claim 7 , wherein the dry etching is performed with argon plasma, such that the residue comprises a polymer with carbon-carbon bonds and carbon-hydrogen bonds.
13 . The manufacturing method of the semiconductor device of claim 7 , further comprising:
disposing an insulating layer on the second conductive layer before performing the dry etching; and
forming an insulating structure by patterning the insulating layer through the dry etching.
14 . The manufacturing method of the semiconductor device of claim 13 , wherein the residue is formed on a top surface of the insulating structure.
15 . The manufacturing method of the semiconductor device of claim 13 , further comprising:
forming a nitride spacer layer covering the first conductive structure, the second conductive structure, and the insulating structure, wherein the nitride spacer layer is in contact with an entire sidewall of the second conductive structure.