Granted Patent B2

US 12,608,160 · App. 18/577,220 · Granted Apr 21, 2026

Inventors: Jun Zhang (Beijing, CN); Xinghui Li (Beijing, CN)

Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.

G06F3/0659G06F3/061G06F3/0671G06F13/1642

Abstract

Claims (80)

1 . A data access method, applied to an electronic device, and the method comprising:

acquiring a plurality of instructions to be processed, wherein each of the instructions to be processed comprises an address to be accessed;

determining instructions to be merged among the plurality of instructions to be processed, and performing merging processing on the instructions to be merged, to obtain a merged instruction;

performing data access according to an address to be accessed corresponding to the merged instruction,

wherein determining instructions to be merged among the plurality of instructions to be processed comprises:

acquiring a first instruction, wherein the first instruction is any instruction among the instructions to be processed;

traversing the instructions to be processed, except the first instruction, to obtain a second instruction, wherein an address to be accessed of the second instruction is indirectly continuous with an address to be accessed of the first instruction, and the address to be accessed of the second instruction is not continuous with the address to be accessed of the first instruction through addresses to be accessed of other instructions to be processed; and

determining the second instruction and the first instruction as the instructions to be merged in response to the second instruction and the first instruction satisfying a first preset merging condition,

wherein the method further comprises:

acquiring a difference value between the address to be accessed of the second instruction and the address to be accessed of the first instruction, wherein the address to be accessed is a logical address;

acquiring a preset storage unit size; and

obtaining a storage interval according to the difference value and the preset storage unit size, wherein the storage interval indicates a distance between the address to be accessed of the first instruction and the address to be accessed of the second instruction.

2 . The method according to claim 1 , wherein determining the second instruction and the first instruction as the instructions to be merged in response to the second instruction and the first instruction satisfying a first preset merging condition comprises:

acquiring at least one of the storage interval or a total amount of currently accessed data, wherein the total amount of currently accessed data indicates a sum of amounts of data to be accessed corresponding to all instructions to be merged;

determining the second instruction and the first instruction as the instructions to be merged, according to at least one of the following: the storage interval being less than a first preset threshold, or the total amount of currently accessed data being less than a second preset threshold.

3 . The method according to claim 2 , further comprising:

stopping traversing the instructions to be processed, except the first instruction, in a case where the total amount of currently accessed data is greater than or equal to the second preset threshold.

4 . The method according to claim 1 , further comprising:

acquiring a first duration and a first time threshold corresponding to the first instruction, wherein the first duration indicates a duration from a moment when it is determined to acquire the first instruction to a current moment;

continuing traversing the instructions to be processed, except the first instruction, in response to the first duration being less than the first time threshold;

stopping traversing the instructions to be processed, except the first instruction, in response to the first duration being greater than or equal to the first time threshold.

5 . The method according to claim 1 , further comprising:

acquiring a first instruction, wherein the first instruction is any instruction among the instructions to be processed;

traversing the instructions to be processed, except the first instruction;

determining a currently traversed instruction to be processed and the first instruction as the instructions to be merged in response to the currently traversed instruction to be processed and the first instruction satisfying a second preset merging condition.

6 . The method according to claim 1 , further comprising:

saving the instructions to be processed in a preset instruction queue;

serving an instruction to be processed in the preset instruction queue that satisfies at least one of the following conditions as the first instruction:

a second duration corresponding to the instruction to be processed is greater than a second time threshold, wherein the second duration indicates a saved duration of the instruction to be processed in the preset instruction queue; or

the instruction to be processed is at a set position in the preset instruction queue, the set position is a head position or a tail position.

7 . The method according to claim 1 , wherein performing merging processing on the instructions to be merged, to obtain a merged instruction comprises:

generating a merged processing result according to addresses to be accessed of respective instructions to be merged, and encapsulating the merged processing result in a set instruction format, to obtain the merged instruction.

8 . The method according to claim 7 , further comprising:

acquiring an amount of data to be accessed corresponding to respective instructions to be merged;

adding the amount of data to be accessed corresponding to respective instructions to be merged to the merged processing result.

9 . A data access apparatus, applied to an electronic device, and the apparatus comprising:

at least one processor; and

a memory configured to store instructions executable by the at least one processor,

wherein the at least one processor is configured to:

acquire a plurality of instructions to be processed, wherein each of the instructions to be processed comprises an address to be accessed;

determine instructions to be merged among the plurality of instructions to be processed, and perform merging processing on the instructions to be merged, to obtain a merged instruction;

perform data access according to an address to be accessed corresponding to the merged instruction;

acquire a first instruction, wherein the first instruction is any instruction among the instructions to be processed;

traverse the instructions to be processed, except the first instruction, to obtain a second instruction, wherein an address to be accessed of the second instruction is indirectly continuous with an address to be accessed of the first instruction, and the address to be accessed of the second instruction is not continuous with the address to be accessed of the first instruction through addresses to be accessed of other instructions to be processed; and

determine the second instruction and the first instruction as the instructions to be merged in response to the second instruction and the first instruction satisfying a first preset merging condition;

acquire a difference value between the address to be accessed of the second instruction and the address to be accessed of the first instruction, wherein the address to be accessed is a logical address;

acquire a preset storage unit size; and

obtain a storage interval according to the difference value and the preset storage unit size, wherein the storage interval indicates a distance between the address to be accessed of the first instruction and the address to be accessed of the second instruction.

10 . The apparatus according to claim 9 , wherein the at least one processor is further configured to:

acquire at least one of the storage interval or a total amount of currently accessed data, wherein the total amount of currently accessed data indicates a sum of amounts of data to be accessed corresponding to all instructions to be merged; and

determine the second instruction and the first instruction as the instructions to be merged, according to at least one of the following: the storage interval being less than a first preset threshold, or the total amount of currently accessed data being less than a second preset threshold.

11 . The apparatus according to claim 10 , wherein the at least one processor is further configured to:

stop traversing the instructions to be processed, except the first instruction, in a case that the total amount of currently accessed data is greater than or equal to the second preset threshold.

12 . The apparatus according to claim 9 , wherein the at least one processor is further configured to:

acquire a first duration, and acquiring a first time threshold corresponding to the first instruction, wherein the first duration indicates a duration from a moment when it is determined to acquire the first instruction to a current moment;

continue traversing the instructions to be processed, except the first instruction, in response to the first duration being less than the first time threshold; and

stop traversing the instructions to be processed, except the first instruction, in response to the first duration being greater than or equal to the first time threshold.

13 . The apparatus according to claim 9 , wherein the at least one processor is further configured to:

acquire a first instruction, wherein the first instruction is any instruction among the instructions to be processed;

traverse instructions to be processed, except the first instruction; and

determine a currently traversed instruction to be processed and the first instruction as the instructions to be merged in response to the currently traversed instruction to be processed and the first instruction satisfying a second preset merging condition.

14 . The apparatus according to claim 9 , wherein the at least one processor is further configured to:

save the instructions to be processed in a preset instruction queue; and

serve an instruction to be processed in the preset instruction queue that satisfies at least one of the following conditions as the first instruction:

a second duration corresponding to the instruction to be processed is greater than a second time threshold, wherein the second duration indicates a saved duration of the instruction to be processed in the preset instruction queue; and

the instruction to be processed is at a set position in the preset instruction queue, the set position is a head position or a tail position.

15 . The apparatus according to claim 9 , wherein the at least one processor is further configured to:

generate a merged processing result according to addresses to be accessed of respective instructions to be merged, and encapsulate the merged processing result in a set instruction format, to obtain the merged instruction.

16 . A non-transient computer-readable storage medium, having a computer program stored thereon, wherein the program implements steps of a data access method, when executed by a processor, wherein the method is applied to an electronic device and comprises:

acquiring a plurality of instructions to be processed, wherein each of the instructions to be processed comprises an address to be accessed;

determining instructions to be merged among the plurality of instructions to be processed, and performing merging processing on the instructions to be merged, to obtain a merged instruction;

performing data access according to an address to be accessed corresponding to the merged instruction,

wherein determining the instructions to be merged among the plurality of instructions to be processed comprises:

acquiring a first instruction, wherein the first instruction is any instruction among the instructions to be processed;

traversing instructions to be processed, except the first instruction, to obtain a second instruction, wherein an address to be accessed of the second instruction is indirectly continuous with an address to be accessed of the first instruction, and the address to be accessed of the second instruction is not continuous with the address to be accessed of the first instruction through addresses to be accessed of other instructions to be processed; and

determining the second instruction and the first instruction as the instructions to be merged, in response to the second instruction and the first instruction satisfying a first preset merging condition,

wherein the method further comprises:

acquiring a difference value between the address to be accessed of the second instruction and the address to be accessed of the first instruction, wherein the address to be accessed is a logical address;

acquiring a preset storage unit size; and

obtaining a storage interval according to the difference value and the preset storage unit size, wherein the storage interval indicates a distance between the address to be accessed of the first instruction and the address to be accessed of the second instruction.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (41)