IP Library › Granted Patent US 12,615,209
Granted Patent B2
US 12,615,209 · App. 17/954,430 · Granted Apr 28, 2026

Inter-chiplet routing of transactions across multi-heterogeneous chiplets using hierarchical addressing

Inventors: Lichen Weng (San Jose, CA); Ramadass Nagarajan (Portland, OR); Anand Jayaraman (Sunnyvale, CA); Vijeta Prasad (Fremont, CA); Justin Reyes (San Jose, CA); Gurucharapathy Karthikeyan (Karnataka, IN)
Assignee: Intel Corporation
H04L45/745G06F13/4027G06F13/42H04L45/16H04L49/109
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Quick Facts
Patent No.
US 12,615,209
App. No.
17/954,430
Granted
Apr 28, 2026
Kind
B2
Abstract

In one embodiment, a first chiplet includes: a plurality of agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet; a die-to die bridge to couple the first chiplet to a second chiplet; a fabric coupled to the die-to-die bridge to route communications between the plurality of agents, where a first agent is to generate a first message having a first destination port identifier; and a first fabric adapter coupled to the first agent, the first fabric adapter to direct the first message to the die-to-die bridge when the first portion of the first destination port identifier identifies a second chiplet as the destination chiplet. Other embodiments are described and claimed.

Claims (42)

1 . An apparatus comprising:

a first chiplet comprising:

a plurality of agents, at least some of the plurality of agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet;

a die-to die bridge to couple the first chiplet to a second chiplet;

a fabric coupled to the die-to-die bridge, wherein the fabric is to route communications between the plurality of agents, wherein a first agent is to generate a first message having a first destination port identifier; and

a first fabric adapter coupled to the first agent, the first fabric adapter to direct the first message to the die-to-die bridge when the first portion of the first destination port identifier identifies a second chiplet of the plurality of chiplets as the destination chiplet.

2 . The apparatus of claim 1 , wherein the first fabric adapter is to direct the first message to the fabric when the first portion of the first destination port identifier identifies the first chiplet as the destination chiplet, the fabric to provide the first message to a second agent of the plurality of agents, based on the second portion of the destination port identifier.

3 . The apparatus of claim 1 , wherein the first portion of the destination port identifier comprises a plurality of most significant bits (MSBs) of the destination port identifier, and the second portion of the destination port identifier comprises a plurality of least significant bits (LSBs) of the destination port identifier.

4 . The apparatus of claim 1 , wherein the first fabric adapter is to replicate a multicast message into a plurality of unicast messages and direct each of the replicated plurality of unicast messages towards a destination agent.

5 . The apparatus of claim 4 , wherein the first fabric adapter is to aggregate a plurality of completions and send an aggregated completion to the first agent, when the first message is a non-posted message.

6 . The apparatus of claim 5 , wherein the fabric adapter is to:

receive one or more of the plurality of completions from one or more agents of the first chiplet; and

receive one or more of the plurality of completions from at least one remote chiplet.

7 . The apparatus of claim 1 , wherein the apparatus comprises a multi-chip package having a first instantiation of the first chiplet and a second instantiation of the first chiplet, the first instantiation having a first lookup table with first mapping information and the second instantiation having a second lookup table with second mapping information different than the first mapping information.

8 . The apparatus of claim 7 , wherein the first mapping information and the second mapping information comprises late binding information.

9 . The apparatus of claim 7 , wherein the multi-chip package further comprises a second chiplet, the second chiplet having a second hardware topology, the first instantiation and the second instantiation of the first chiplet having a common hardware topology.

10 . The apparatus of claim 1 , wherein the D2D bridge is to abort a second message when a destination port identifier of the second message is not present in a lookup table.

11 . The apparatus of claim 1 , wherein the D2D bridge comprises a memory to store a lookup table having a plurality of entries, each of the plurality of entries to store a destination chiplet identifier and routing information.

12 . The apparatus of claim 11 , wherein the D2D bridge is to access an entry of the lookup table based at least in part on the first portion of the destination port identifier.

13 . The apparatus of claim 11 , wherein the lookup table is visible to a basic input output system.

14 . The apparatus of claim 1 , wherein the D2D bridge is to:

receive a plurality of completions from at least some of the plurality of agents come on the plurality of completions in response to a message from a remote source agent; and

based at least in part on the plurality of completions, send an aggregated completion towards the remote source agent.

15 . A method comprising:

receiving, in a die-to-die (D2D) bridge of a first chiplet, a message from a second chiplet;

accessing a mapping structure using a destination port identifier of message, the destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet; and

forwarding the message to another chiplet when the first portion of the destination port identifier identifies the another chiplet; and

forwarding the message to a fabric of the first chiplet to cause the fabric to direct the message to a destination agent of the first chiplet when the first portion of the destination port identifier identifies the first chiplet.

16 . The method of claim 15 , further comprising dropping message if the destination port identifier is not present in the mapping structure.

17 . The method of claim 15 , further comprising:

when the message is a multicast message, decoding, in the D2D bridge, a multicast group identifier of the message; and

generating a plurality of unicast messages from the message.

18 . A system comprising:

a first system on chip (SoC) comprising a multi-heterogenous chiplet package comprising a first chiplet and a second chiplet, the first chiplet comprising:

a first agent and a second agent, the first and second agents to generate messages, each of the messages having a destination port identifier comprising a first portion to identify a destination chiplet and a second portion to identify a destination agent on the destination chiplet;

storage to store a first routing table, the first routing table to identify, for each of a plurality of chiplets of the system, a destination chiplet and a routing action;

a die-to die bridge to couple the first chiplet to the second chiplet, wherein the die-to-die bridge, based on the first routing table, is to send:

a first message having a first destination port identifier to the second chiplet when the first portion of the first destination port identifier identifies the second chiplet as the destination chiplet; and

a second message having a second destination port identifier to the second chiplet when the first portion of the second destination port identifier identifies a first chiplet of a second SoC as the destination chiplet; and

the second SoC coupled to the first SoC, the second SoC comprising the first chiplet and a third chiplet, wherein the storage of the first chiplet of the second SoC is to store a second routing table, the second routing table different than the first routing table.

19 . The system of claim 18 , wherein the first chiplet is heterogenous to the second chiplet.

20 . The system of claim 18 , further comprising another integrated circuit coupled between the first SoC and the second SoC, wherein a die-to-die bridge of the second chiplet of the first SoC is to send the second message to the another integrated circuit, to enable the another integrated circuit to send the second message to the second SoC.

Continuity (1)
Related Publication 20230027585A1 · Jan 26, 2023
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