IP Library › Granted Patent US 12,615,818
Granted Patent B2
US 12,615,818 · App. 18/299,086 · Granted Apr 28, 2026

Semiconductor transistor devices including alternatively stacked source/drain regions

Inventors: Seojin Jeong (Suwon-si, KR); Jungtaek Kim (Suwon-si, KR); Moonseung Yang (Suwon-si, KR); Sumin Yu (Suwon-si, KR); Namkyu Cho (Suwon-si, KR); Seokhoon Kim (Suwon-si, KR); Pankwi Park (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10D62/121H10D30/6735
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Quick Facts
Patent No.
US 12,615,818
App. No.
18/299,086
Granted
Apr 28, 2026
Kind
B2
Abstract

Semiconductor device may include an active region extending in a first direction, channel layers spaced apart from each other in a vertical direction, a gate structure extending on the active region and the channel layers to surround the channel layers and extending in a second direction, and a source/drain region on the active region adjacent to a side of the gate structure and contacting the plurality of channel layers. The source/drain region includes first to sixth epitaxial layers that are sequentially stacked in the vertical direction and have respective first to sixth germanium (Ge) concentrations. The first Ge concentration is lower than the second Ge concentration, the third Ge concentration is lower than the second Ge concentration and the fourth Ge concentration, and the fifth Ge concentration is lower than the fourth Ge concentration and the sixth Ge concentration.

Claims (52)

1 . A semiconductor device comprising:

an active region extending in a first direction on a substrate;

a plurality of channel layers on the active region and spaced apart from each other in a vertical direction that is perpendicular to an upper surface of the substrate;

a gate structure traversing the active region and the plurality of channel layers and extending in a second direction, wherein the plurality of channel layers are in the gate structure; and

a source/drain region on the active region adjacent to a side of the gate structure and contacting the plurality of channel layers,

wherein the source/drain region comprises:

a first epitaxial layer on the active region, the first epitaxial layer contacting the plurality of channel layers, comprising a first upper surface and having a first germanium (Ge) concentration;

a second epitaxial layer on the first upper surface of the first epitaxial layer, the second epitaxial layer comprising a second upper surface and having a second Ge concentration that is higher than the first Ge concentration;

a third epitaxial layer on the second upper surface of the second epitaxial layer, the third epitaxial layer comprising a third upper surface and having a third Ge concentration that is lower than the second Ge concentration;

a fourth epitaxial layer on the third upper surface of the third epitaxial layer, the fourth epitaxial layer comprising a fourth upper surface and having a fourth Ge concentration that is higher than the third Ge concentration;

a fifth epitaxial layer on the fourth upper surface of the fourth epitaxial layer, the fifth epitaxial layer comprising a fifth upper surface and having a fifth Ge concentration that is lower than the fourth Ge concentration; and

a sixth epitaxial layer on the fifth upper surface of the fifth epitaxial layer and in a space defined by the fifth upper surface of the fifth epitaxial layer, the sixth epitaxial layer comprising a sixth upper surface and having a sixth Ge concentration that is higher than the fifth Ge concentration, and

wherein the first, second, third, fourth and fifth upper surfaces are curved toward the substrate.

2 . The semiconductor device of claim 1 , wherein a central portion of each of the second to fifth epitaxial layers in the first direction has a thickest thickness of each of the second to fifth epitaxial layers.

3 . The semiconductor device of claim 1 , wherein the substrate is equidistant from uppermost ends of the second to fifth epitaxial layers.

4 . The semiconductor device of claim 3 , wherein the substrate is equidistant from an uppermost end of the sixth epitaxial layer and the uppermost end of the second epitaxial layer.

5 . The semiconductor device of claim 3 , wherein the uppermost end of the second epitaxial layer is closer than the uppermost end of the sixth epitaxial layer to the substrate.

6 . The semiconductor device of claim 5 , wherein the sixth epitaxial layer further comprises a lower surface contacting the fifth upper surface of the fifth epitaxial layer and a side surface contacting the first upper surface of the first epitaxial layer.

7 . The semiconductor device of claim 1 , wherein uppermost ends of the second and third epitaxial layers are at a first point, and

uppermost ends of the fourth and fifth epitaxial layers are at a second point that is farther than the first point from the substrate.

8 . The semiconductor device of claim 7 , wherein the second point is closer than an uppermost end of the sixth epitaxial layer to the substrate.

9 . The semiconductor device of claim 7 , wherein the fourth epitaxial layer further comprises a lower surface contacting the third upper surface of the third epitaxial layer and a side surface contacting the first upper surface of the first epitaxial layer.

10 . The semiconductor device of claim 1 , wherein the first Ge concentration ranges from about 5 atomic percent (at %) to about 8 at %.

11 . The semiconductor device of claim 1 , wherein each of the second Ge concentration, the fourth Ge concentration, and the sixth Ge concentration ranges from about 30 atomic percent (at %) to about 70 at %.

12 . The semiconductor device of claim 1 , wherein the fourth Ge concentration is higher than the second Ge concentration, and

the sixth Ge concentration is higher than the fourth Ge concentration.

13 . The semiconductor device of claim 1 , wherein the fifth Ge concentration is higher than the third Ge concentration.

14 . A semiconductor device comprising:

an active region extending in a first direction on a substrate;

a gate structure traversing the active region and extending in a second direction on the substrate; and

a source/drain region on the active region adjacent to a side of the gate structure,

wherein the source/drain region comprises:

a plurality of epitaxial layers including silicon-germanium (SiGe); and

a plurality of insertion layers that include silicon-germanium and are stacked alternately with the plurality of epitaxial layers, and

germanium concentrations in the plurality of epitaxial layers are higher than germanium concentrations in the plurality of insertion layers, and

wherein the plurality of insertion layers comprise an upper insertion layer and a lower insertion layer that is between the active region and the upper insertion layer, and

the upper insertion layer has a germanium concentration that is higher than a germanium concentration in the lower insertion layer.

15 . The semiconductor device of claim 14 , wherein the plurality of epitaxial layers comprise an upper epitaxial layer and a lower epitaxial layer that is between the active region and the upper epitaxial layer, and

the upper epitaxial layer has a germanium concentration that is higher than a germanium concentration in the lower epitaxial layer.

16 . The semiconductor device of claim 14 , wherein the plurality of epitaxial layers comprise an uppermost epitaxial layer that is farthest from the active region among the plurality of epitaxial layers, and

the uppermost epitaxial layer has a highest germanium concentration among the plurality of epitaxial layers.

17 . The semiconductor device of claim 14 , wherein a number of the plurality of insertion layers is at most 50.

18 . A semiconductor device comprising:

an active region extending in a first direction on a substrate;

a plurality of channel layers on the active region and spaced apart from each other in a vertical direction that is perpendicular to an upper surface of the substrate;

a gate structure traversing the active region and the plurality of channel layers, the gate structure surrounding the plurality of channel layers and extending in a second direction; and

a source/drain region on the active region adjacent to a side of the gate structure and contacting the plurality of channel layers,

wherein the source/drain region includes first, second, third, fourth, fifth and sixth epitaxial layers that are sequentially stacked in the vertical direction and have respective first, second, third, fourth, fifth and sixth germanium (Ge) concentrations,

the first Ge concentration is lower than the second Ge concentration,

the third Ge concentration is lower than the second Ge concentration and the fourth Ge concentration, and

the fifth Ge concentration is lower than the fourth Ge concentration and the sixth Ge concentration.

19 . The semiconductor device of claim 18 , wherein each of the second Ge concentration, the fourth Ge concentration, and the sixth Ge concentration ranges from about 30 atomic percent (at %) to about 70 at %.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2023
From: JEONG, SEOJIN; KIM, JUNGTAEK; YANG, MOONSEUNG; YU, SUMIN; CHO, NAMKYU; KIM, SEOKHOON; PARK, PANKWI
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 063294/0728 →
Priority Claims (1)
KR 10-2022-0068904 · Jun 7, 2022 · national
Continuity (1)
Related Publication 20230395662A1 · Dec 7, 2023
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