IP Library Granted Patent US 12,615,892
Granted Patent B2
US 12,615,892 · App. 18/413,013 · Granted Apr 28, 2026

High-density micro-LED arrays with reflective sidewalls

Inventors: Kai Ding (Cupertino, CA); Lisong Xu (San Jose, CA); Mingwei Zhu (San Jose, CA); Zhiyong Li (Foster City, CA); Hou T. Ng (Campbell, CA); Sivapackia Ganapathiappan (Los Altos, CA); Nag Patibandla (Dublin, CA)
Assignee: Applied Materials, Inc.
H10H20/841H01L25/167H10H20/011H10H20/032H10H20/825H10H20/856H10H29/142H10H29/8421H10K59/1201H10K59/122H10K59/35H10K59/878H10H20/034
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Quick Facts
Patent No.
US 12,615,892
App. No.
18/413,013
Granted
Apr 28, 2026
Kind
B2
Abstract

Micro-LED structures include an LED epilayer that may be formed before the micro-LED structure is coupled to a backplane substrate. In order to prevent light leakage and maximize light output, the sidewalls and other surfaces of the LED epilayer may be coated with a reflective coating. For example, the reflective coating may include a metal layer that is electrically insulated between dielectric layers from the micro-LED electrodes. The reflective coating may also be formed using multiple layers in a distributed Bragg reflector configuration. This reflective coating may be formed during the LED fabrication process before the micro-LED structure is coupled to the backplane. The pixel isolation structures on the backplane may also include a reflective coating that is applied above the LED epilayers.

Claims (43)

1 . A pixel, comprising:

a backplane;

light-emitting diodes (LEDs) disposed on the backplane, each LED having:

a first electrode coupled to a second electrode on the backplane;

an LED epilayer having a first side coupled to the first electrode and sidewalls extending in a direction away from the backplane;

a reflective coating disposed over the sidewalls of the LED epilayer, wherein the reflective coating comprises a plurality of layers of a Distributed Bragg Reflector (DBR); and

a first dielectric layer between the LED epilayer and the reflective coating;

isolation structures, the isolation structures defining wells of subpixels, each well including a respective LED between adjacent isolation structures; and

the subpixels, each subpixel having a color conversion material disposed in the wells.

2 . The pixel of claim 1 , wherein the reflective coating substantially covers the sidewalls of the LED epilayer to prevent light leakage out of the sidewalls of the LED epilayer.

3 . The pixel of claim 1 , wherein the reflective coating further covers a portion of the first side of the LED epilayer.

4 . The pixel of claim 3 , wherein the reflective coating leaves an opening on the first side of the LED epilayer through which the first electrode is coupled.

5 . The pixel of claim 1 , further comprising a second dielectric layer over the reflective coating.

6 . The pixel of claim 5 , wherein the first dielectric layer and the second dielectric layer enclose the reflective coating to electrically isolate the reflective coating from the first electrode.

7 . The pixel of claim 1 , wherein the reflective coating comprises a metal layer.

8 . The pixel of claim 1 , wherein the reflective coating comprises a material from the group consisting of: Al, Rh, Pt, Ag, Au, and Cr.

9 . The pixel of claim 1 , wherein the plurality of layers of the DBR comprises alternating layers of SiO 2 and TiO 2 .

10 . A method of fabricating a micro-LED structure, the method comprising:

performing a mesa etch on an LED epilayer to form a first level comprising p-doped Gallium Nitride (GaN) and a second level comprising n-doped GaN;

forming light-emitting diodes (LEDs) disposed on a backplane, each LED having:

a first electrode coupled to a second electrode on the backplane;

an LED epilayer having a first side coupled to the first electrode and sidewalls extending in a direction away from the backplane;

a reflective coating disposed over the sidewalls of the LED epilayer; and

a first dielectric layer between the LED epilayer and the reflective coating;

forming isolation structures, the isolation structures defining wells of subpixels, each well including a respective LED between adjacent isolation structures; and

forming the subpixels, each subpixel having a color conversion material disposed in the wells.

11 . The method of claim 10 , further comprising selectively forming the reflective coating to leave an opening on the first side of the LED epilayer where the first electrode is coupled to the first side of the LED epilayer.

12 . The method of claim 10 , wherein the first electrode is coupled to the n-doped GaN.

13 . The method of claim 12 , further comprising forming a third electrode coupled to the p-doped GaN.

14 . The method of claim 10 , further comprising:

forming a dielectric layer between the reflective coating and the LED epilayer; and

etching the dielectric layer to expose the LED epilayer where the first electrode couples to the first side of the LED epilayer.

15 . A display comprising:

a backplane substrate;

a plurality of pixels mounted to the backplane substrate, wherein each of the plurality of pixels comprises a plurality of subpixels, and each of the plurality of subpixels comprises an LED disposed on the backplane, each LED comprising:

a first electrode coupled to a second electrode on the backplane;

an LED epilayer having a first side coupled to the first electrode and sidewalls extending in a direction away from the backplane;

a reflective coating disposed over the sidewalls of the LED epilayer;

a first dielectric layer between the LED epilayer and the reflective coating;

isolation structures, the isolation structures defining wells of subpixels, each well including a respective subpixel between adjacent isolation structures;

luminescence regions formed on the LED epilayers; and

second reflective coatings between the luminescence regions and the isolation structures.

16 . The display of claim 15 , wherein the second reflective coatings cover a portion of the plurality of pixel isolation structures that extends above the height of the LED epilayers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2024
From: DING, KAI; XU, LISONG; ZHU, MINGWEI; LI, ZHIYONG; NG, HOU T.; GANAPATHIAPPAN, SIVAPACKIA; PATIBANDLA, NAG
To: APPLIED MATERIALS, INC.
Reel/Frame 066187/0644 →
Continuity (3)
Continuation 18305852 · Apr 24, 2023
Provisional Application 63333702 · Apr 22, 2022
Related Publication 20240186458A1 · Jun 6, 2024
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