Multiband QAM interface for slab waveguide
Systems and methods are provided for an integrated chip. An integrated chip includes a package substrate including a plurality of first layers and a plurality of second layers, each second layer being disposed between a respective adjacent pair of the first layers. A transceiver unit is disposed above the package substrate. A waveguide unit including a plurality of waveguides having top and bottom walls formed in the first layers of the package substrate and sidewalls formed in the second layers of the package substrate.
1 . An integrated chip comprising:
a plurality of waveguides having a length extending in a first direction, arranged along a second direction transverse to the first direction;
a first coupling unit including a coupler aligned with a top wall of a first waveguide of the plurality of waveguides in the first direction and misaligned with a waveguide opening of the first waveguide in the first direction;
a second coupling unit including a coupler aligned with the top wall of the first waveguide in the first direction and misaligned with the waveguide opening of the first waveguide in the first direction, wherein the top wall of the first waveguide is disposed between the first and second coupling units and the first and second coupling units define a distance therebetween shorter than a length of a second waveguide of the plurality of waveguides;
a first shield unit disposed between the first coupling unit and a waveguide opening of the second waveguide and coupled between a transmitter and a top surface of a bottom wall of the first waveguide, wherein the first coupling unit is disposed between the waveguide opening of the first waveguide and the first shield unit; and
a second shield unit disposed between the second coupling unit and the waveguide opening of the second waveguide and coupled between a receiver and the top surface of the bottom wall of the first waveguide, wherein the second coupling unit is disposed between the waveguide opening of the first waveguide and the second shield unit.
2 . The integrated chip of claim 1 , wherein:
the first coupling unit is configured to couple a first electrical signal generated by a transceiver unit to a waveguide unit as an electromagnetic radiation; and
the second coupling unit is configured to couple the electromagnetic radiation from the waveguide unit as a second electrical signal to the transceiver unit.
3 . The integrated chip of claim 1 , wherein the first shield unit is configured to minimize crosstalk between the plurality of waveguides, the first shield unit coupling a waveguide unit to a ground.
4 . The integrated chip of claim 1 , wherein each of the first and second coupling units is disposed between a waveguide unit and a respective one of the first and second shield units.
5 . The integrated chip of claim 1 , further comprising:
a transceiver unit disposed above a package substrate and including the transmitter and the receiver; and
an interposer disposed between the package substrate and the transceiver unit and having a plurality of interconnects.
6 . The integrated chip of claim 1 , wherein at least one of the plurality of waveguides includes a conductive material.
7 . The integrated chip of claim 1 , wherein a cross-sectional shape of each waveguide is the same.
8 . The integrated chip of claim 1 , wherein a width of each waveguide is about 5 to about 15 times a height thereof.
9 . The integrated chip of claim 1 , wherein each of the waveguides is a dielectric waveguide comprising silicon nitride or silicon carbide.
10 . The integrated chip of claim 1 , wherein each of the waveguides is a dielectric waveguide comprising fluorine-doped silicon dioxide, carbon-doped silicon dioxide, or porous silicon dioxide.
11 . The integrated chip of claim 1 , wherein the transmitter is configured to generate a first electrical signal, the integrated chip further comprising:
a first interposer, wherein the first coupling unit is configured to receive the first electrical signal through the first interposer and to couple the first electrical signal to a waveguide unit as a first electromagnetic radiation.
12 . The integrated chip of claim 11 , wherein the first interposer includes a metal line that extends in the first direction and a via that extends in the second direction.
13 . The integrated chip of claim 11 , further comprising:
a transceiver unit disposed above a package substrate and including the transmitter and the receiver, wherein the package substrate includes a first interconnect; and
a bump having a substantially rounded cross section and interconnecting the first interposer and the first interconnect.
14 . The integrated chip of claim 11 , further comprising:
a transceiver unit disposed above a package substrate and including the transmitter and the receiver, wherein the transceiver unit further includes a second transmitter configured to generate a second electrical signal;
a second interposer;
a second coupler configured to receive the second electrical signal through the second interposer and to couple the second electrical signal to a waveguide unit as a second electromagnetic radiation; and
a shield between the second coupler and a waveguide opening of a third waveguide, connecting the waveguide unit to a ground, and including a plurality of metal lines that extend in the first direction and a plurality of vias that extend in the second direction.
15 . The integrated chip of claim 1 , wherein:
the coupler of the first coupling unit is configured to couple an electrical signal between a transceiver unit and the first waveguide,
the coupler of the first coupling unit is horizontally closer to a side of the top wall of the first waveguide than a vertical projection of a corresponding side of the bottom wall of the first waveguide,
a shield of the first shield unit is configured to minimize crosstalk between the first and second waveguides, includes a metal line and a via, and coupled between the bottom wall of the first waveguide and an electrical ground, and
the coupler of the first coupling unit is between the top wall of the first waveguide and the shield of the first shield unit.
16 . The integrated chip of claim 1 , further comprising:
a package substrate including a plurality of layers; and
a transceiver unit disposed above the package substrate and including the transmitter and the receiver, wherein the coupler of the first coupling unit is in the same layer of the package substrate as the top wall of first waveguide and is in a different layer of the package substrate than a sidewall of the first waveguide.
17 . The integrated chip of claim 1 , wherein the coupler of the first coupling unit includes a transducer.
18 . The integrated chip of claim 1 , wherein the coupler of the first coupling unit includes an antenna.
19 . An integrated chip comprising:
a transmitter;
a receiver;
a plurality of waveguides having a length extending in a first direction, arranged along a second direction transverse to the first direction;
a first coupling unit including a coupler aligned with a top wall of a first waveguide of the plurality of waveguides in the first direction and misaligned with a waveguide opening of the first waveguide in the first direction;
a second coupling unit including a coupler aligned with the top wall of the first waveguide in the first direction and misaligned with the waveguide opening of the first waveguide in the first direction, wherein the top wall of the first waveguide is disposed between the first and second coupling units and the first and second coupling units define a distance therebetween shorter than a length of a second waveguide of the plurality of waveguides;
a first shield unit disposed between the first coupling unit and a waveguide opening of the second waveguide and coupled between the transmitter and a top surface of a bottom wall of the first waveguide, wherein the first coupling unit is disposed between the waveguide opening of the first waveguide and the first shield unit; and
a second shield unit disposed between the second coupling unit and the waveguide opening of the second waveguide and coupled between the receiver and the top surface of the bottom wall of the first waveguide, wherein the second coupling unit is disposed between the waveguide opening of the first waveguide and the second shield unit.
20 . An integrated chip comprising:
a transceiver unit disposed above a package substrate and including a transmitter and a receiver;
a waveguide unit including a plurality of waveguides having a length extending in a first direction, arranged along a second direction transverse to the first direction;
a first coupling unit including a coupler aligned with a top wall of a first waveguide of the plurality of waveguides in the first direction and misaligned with a waveguide opening of the first waveguide in the first direction;
a second coupling unit including a coupler aligned with the top wall of the first waveguide in the first direction and misaligned with the waveguide opening of the first waveguide in the first direction, wherein the top wall of the first waveguide is disposed between the first and second coupling units and the first and second coupling units define a distance therebetween shorter than a length of a second waveguide of the plurality of waveguides;
a first shield unit disposed between the first coupling unit and a waveguide opening of a second waveguide of the plurality of waveguides and coupled between the transmitter and a top surface of a bottom wall of the first waveguide, wherein the first coupling unit is disposed between the waveguide opening of the first waveguide and the first shield unit; and
a second shield unit disposed between the second coupling unit and the waveguide opening of the second waveguide and coupled between the receiver and the top surface of the bottom wall of the first waveguide, wherein the second coupling unit is disposed between the waveguide opening of the first waveguide and the second shield unit.