IP Library › Granted Patent US 12,616,036
Granted Patent B2
US 12,616,036 · App. 18/341,119 · Granted Apr 28, 2026

Interconnect substrate, method of making the same, and method of identifying interconnect substrate

Inventor: Kazuki Wada (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
H10W46/00G06T7/001H10W70/095H10W70/69G06T2207/30148H10W46/401H10W70/635
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Quick Facts
Patent No.
US 12,616,036
App. No.
18/341,119
Granted
Apr 28, 2026
Kind
B2
Abstract

An interconnect substrate includes an insulating layer, a dispersion layer, and an interconnect layer, the insulating layer, the dispersion layer, and the interconnect layer being laminated together, wherein the dispersion layer includes a main material and one or more fillers dispersed in the main material, the one or more fillers forming a unique dispersion pattern, and wherein the unique dispersion pattern is identifiable by image recognition from outside of the interconnect substrate.

Claims (15)

1 . An interconnect substrate comprising:

an insulating layer;

a dispersion layer; and

an interconnect layer, the insulating layer, the dispersion layer, and the interconnect layer being laminated together,

wherein the dispersion layer includes a main material and one or more fillers dispersed in the main material, the one or more fillers forming a unique dispersion pattern, and

wherein the unique dispersion pattern is identifiable by image recognition from outside of the interconnect substrate.

2 . The interconnect substrate as claimed in claim 1 , wherein the one or more fillers are either non-conductive particles, fibers, or both.

3 . The interconnect substrate as claimed in claim 2 , wherein the dispersion layer includes a plurality of layers, and each of the plurality of layers contains a filler of a different type or shape than a filler contained in one or more other layers of the plurality of layers.

4 . The interconnect substrate as claimed in claim 1 , wherein density of the one or more fillers is non-uniform in a plan view.

5 . The interconnect substrate as claimed in claim 4 , wherein when the dispersion layer is divided into sections of 5 rows and 5 columns having a same area in a plan view, and a section-wise density of the one or more fillers in each section and an average value of section-wise densities of the one or more fillers in all of the sections are calculated, a maximum value and a minimum value of the section-wise densities are outside a range of 30% above and below the average value in at least one of the sections.

6 . The interconnect substrate as claimed in claim 4 , wherein the density of the one or more fillers decreases from one side to an opposite side in a predetermined direction in a plan view of the dispersion layer.

7 . The interconnect substrate as claimed in claim 1 , wherein the main material of the dispersion layer is a material selected from a group consisting of a thermosetting resin including an epoxy-based resin or a phenol-based resin, a thermoplastic resin including a polyimide-based resin or an acrylic-based resin, an elastomer, a precursor thereof, and a copolymer thereof.

8 . The interconnect substrate as claimed in claim 1 , wherein the main material of the dispersion layer is an amorphous thermoplastic resin or a crystalline thermoplastic resin having an amorphous portion.

9 . The interconnect substrate as claimed in claim 1 , wherein the one or more fillers are an inorganic oxide or an inorganic nitride.

10 . The interconnect substrate as claimed in claim 1 , wherein the one or more fillers are an organic substance.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2023
From: WADA, KAZUKI
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 064057/0775 →
Priority Claims (1)
JP 2022-106602 · Jun 30, 2022 · national
Continuity (1)
Related Publication 20240006334A1 · Jan 4, 2024
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