IP Library › Granted Patent US 12,620,367
Granted Patent B2
US 12,620,367 · App. 18/961,581 · Granted May 5, 2026

Circuit device and display system

Inventors: Stanislav Zaozerskii (Richmond, CA); Sebdani mahmood Mazrouei (Markham, CA); Kumar anandabairavasamy Anand (Richmond, CA)
Assignee: SEIKO EPSON CORPORATION
G09G3/3413G09G3/3426G09G2320/0242G09G2320/0285G09G2320/0646G09G2360/16
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,620,367
App. No.
18/961,581
Granted
May 5, 2026
Kind
B2
Abstract

A circuit device includes a luminance processing circuit and a color correction circuit. The luminance processing circuit computes lighting luminance information indicating luminance at which a target pixel of a display panel is illuminated by a plurality of light source elements, based on light source luminance information indicating luminance of light emitted by each of the plurality of light source elements and attenuation rate distribution information indicating an attenuation rate distribution of light with respect to a distance between each of the light source elements and each of pixels. The color correction circuit performs color correction on input image data based on the lighting luminance information. The luminance processing circuit computes the lighting luminance information by disabling light source luminance information of virtual light source positions where the plurality of light source elements are not arranged in a computing grid used for computation of the lighting luminance information.

Claims (39)

1 . A circuit device that controls a display device including a plurality of light source elements and a display panel, the circuit device comprising:

a luminance processing circuit that computes lighting luminance information indicating luminance at which a target pixel of the display panel is illuminated by the plurality of light source elements, based on light source luminance information indicating luminance of light emitted by each of the plurality of light source elements and attenuation rate distribution information indicating an attenuation rate distribution of light with respect to a distance between each of the light source elements and each of pixels; and

a color correction circuit that performs color correction on input image data, based on the lighting luminance information, wherein

the luminance processing circuit

computes the lighting luminance information by disabling the light source luminance information of virtual light source positions where the plurality of light source elements are not arranged in a computing grid used for computation of the lighting luminance information.

2 . The circuit device according to claim 1 , further comprising

a storage unit that stores grid identification information for identifying at least one of effective light source positions, at which the plurality of light source elements are arranged, and the virtual light source positions in the computing grid, wherein

the luminance processing circuit

disables the light source luminance information of the virtual light source positions, based on the grid identification information.

3 . The circuit device according to claim 2 , wherein

the storage unit

stores the grid identification information in which the effective light source positions or the virtual light source positions are identified for light source positions in the computing grid.

4 . The circuit device according to claim 2 , wherein

the storage unit

stores the grid identification information for designating any one preset from a plurality of presets in which the effective light source positions or the virtual light source positions are identified in advance for light source positions in the computing grid.

5 . The circuit device according to claim 1 , wherein

the luminance processing circuit includes at least two modes of:

an effective light source mode in which light source positions in the computing grid are set to effective light source positions at which the plurality of light source elements are arranged;

a virtual light source mode in which the light source positions in the computing grid are set to the virtual light source positions; and

a mixed mode in which the effective light source positions and the virtual light source positions are mixed in the computing grid.

6 . The circuit device according to claim 5 , wherein

the luminance processing circuit

sets a first mode, which is one of the at least two modes, for a first region in the computing grid, and

sets a second mode, which is different from the first mode, of the at least two modes for a second region different from the first region in the computing grid.

7 . The circuit device according to claim 1 , wherein

the computing grid is

a grid in which light source positions are aligned at a first interval in a horizontal scanning direction and light source positions are aligned at a second interval in a vertical scanning direction.

8 . The circuit device according to claim 7 , wherein

one of an odd-numbered column and an even-numbered column in an odd-numbered row and an other of an odd-numbered column and an even-numbered column in an even-numbered row are the virtual light source positions in the computing grid.

9 . The circuit device according to claim 1 , wherein

the luminance processing circuit includes:

a light source luminance determination circuit that disables the light source luminance information of the virtual light source positions in the computing grid and determines the light source luminance information, based on the input image data; and

a lighting luminance computation circuit that computes the lighting luminance information, based on the light source luminance information, which is determined by the light source luminance determination circuit, and the attenuation rate distribution information.

10 . The circuit device according to claim 1 , wherein

the luminance processing circuit

computes the lighting luminance information by using the light source luminance information of s×t light source positions around the target pixel in the computing grid, each of s and t being an integer of 2 or more.

11 . A display system comprising:

the circuit device according to claim 1 ; and

the display device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: ZAOZERSKII, STANISLAV; MAZROUEI, SEBDANI MAHMOOD; ANAND, KUMAR ANANDABAIRAVASAMY
To: SEIKO EPSON CORPORATION
Reel/Frame 069424/0400 →
Priority Claims (1)
JP 2023-200471 · Nov 28, 2023 · national
Continuity (1)
Related Publication 20250174204A1 · May 29, 2025
References Cited (16)
US 8390656B2 · Muroi et al. · 2013 [cited by applicant]
US 8605017B2 · Brown Elliott et al. · 2013 [cited by applicant]
US 8670006B2 · Hong et al. · 2014 [cited by applicant]
US 8982038B2 · Higgins et al. · 2015 [cited by applicant]
US 9240144B2 · Cho et al. · 2016 [cited by applicant]
US 9390660B2 · Johnson et al. · 2016 [cited by applicant]
US 11475865B2 · Chappalli · 2022 [cited by applicant]
US 20090174638A1 · Brown Elliott · 2009 [cited by examiner]
US 20110273495A1 · Ward et al. · 2011 [cited by applicant]
US 20200160813A1 · Aurongzeb · 2020 [cited by examiner]
US 20210311361A1 · Okamoto · 2021 [cited by examiner]
US 20220319402A1 · Furukawa · 2022 [cited by examiner]
US 20240013739A1 · Akiba et al. · 2024 [cited by applicant]
JP 2019095559A · 2019 [cited by applicant]
JP 2021009170A · 2021 [cited by applicant]
JP 2024009483A · 2024 [cited by applicant]