Cache line hold state for multiprocessing computing systems
A present invention embodiment provides a cache line hold state that reduces cache contention. A first processor executes a store instruction to acquire a lock on a cache line in a shared memory system of a multiprocessor computing system. The first processor sets the cache line to an exclusive state in a local cache of the first processor upon successful acquisition of the lock. A lock state indicative of a windowed hold on the cache line is recorded by the first processor, wherein the windowed hold enables non-exclusive fetch requests from one or more other processors.
1 . A computer-implemented method comprising:
executing, by a first processor, a store instruction to acquire a lock on a cache line in a shared memory system of a multiprocessor computing system;
setting, by the first processor, the cache line to an exclusive state in a local cache of the first processor upon successful acquisition of the lock; and
recording a lock state indicative of a windowed hold on the cache line by the first processor, wherein the windowed hold enables non-exclusive fetch requests from one or more other processors.
2 . The method of claim 1 , further comprising:
receiving a non-exclusive fetch request from a second processor;
in response to receiving the non-exclusive fetch request, demoting, by the first processor, the cache line to read-only; and
returning, by the first processor, data of the cache line to the second processor.
3 . The method of claim 2 , wherein the returning further comprises returning an indication that the cache line is held in the windowed hold by the first processor.
4 . The method of claim 1 , further comprising:
in response to receiving a non-exclusive fetch request from a second processor, setting, by the first processor, the cache line to a primed-for-long-hold state, wherein the primed-for-long-hold state causes an exclusive fetch request for the cache line by the one or more other processors to be rejected and permits a read-only request for the cache line by the one or more other processors.
5 . The method of claim 4 , further comprising:
in response to a write request being issued by the first processor, reacquiring, by the first processor, the cache line in the exclusive state; and
recording the lock state indicative of a long-hold on the cache line by the first processor, wherein the lock state indicative of the long-hold causes read and write requests to the cache line by the one or more other processors to be rejected.
6 . The method of claim 5 , further comprising:
completing, by the first processor, a second store instruction and in response, releasing the lock and clearing the lock state.
7 . The method of claim 1 , wherein the store instruction comprises a hint instruction on a compare and swap instruction.
8 . The method of claim 1 , wherein the store instruction comprises a Next Instruction Access Intent (NIAI) hint instruction preceding the store instruction.
9 . A computer system comprising:
a processor set;
one or more computer-readable storage medium; and
program instructions stored on the one or more computer-readable storage medium to cause the processor set to perform operations comprising:
executing, by a first processor, a store instruction to acquire a lock on a cache line in a shared memory system of a multiprocessor computing system;
setting, by the first processor, the cache line to an exclusive state in a local cache of the first processor upon successful acquisition of the lock; and
recording a lock state indicative of a windowed hold on the cache line by the first processor, wherein the windowed hold enables non-exclusive fetch requests from one or more other processors.
10 . The computer system of claim 9 , wherein the program instructions further cause the processor set to perform operations comprising:
receiving a non-exclusive fetch request from a second processor;
in response to receiving the non-exclusive fetch request, demoting, by the first processor, the cache line to read-only; and
returning, by the first processor, data of the cache line to the second processor.
11 . The computer system of claim 10 , wherein the returning further comprises returning an indication that the cache line is held in the windowed hold by the first processor.
12 . The computer system of claim 9 , wherein the program instructions further cause the processor set to perform operations comprising:
in response to receiving a non-exclusive fetch request from a second processor, setting, by the first processor, the cache line to a primed-for-long-hold state, wherein the primed-for-long-hold state causes an exclusive fetch request for the cache line by the one or more other processors to be rejected and permits a read-only request for the cache line by the one or more other processors.
13 . The computer system of claim 12 , wherein the program instructions further cause the processor set to perform operations comprising:
in response to a write request being issued by the first processor, reacquiring, by the first processor, the cache line in the exclusive state; and
recording the lock state indicative of a long-hold on the cache line by the first processor, wherein the lock state indicative of the long-hold causes read and write requests to the cache line by the one or more other processors to be rejected.
14 . The computer system of claim 13 , wherein the program instructions further cause the processor set to perform operations comprising:
completing, by the first processor, a second store instruction and in response, releasing the lock and clearing the lock state.
15 . The computer system of claim 9 , wherein the store instruction comprises a hint instruction on a compare and swap instruction.
16 . The computer system of claim 9 , wherein the store instruction comprises a Next Instruction Access Intent (NIAI) hint instruction preceding the store instruction.
17 . A method comprising:
executing, by a first processor, a non-exclusive fetch request to fetch data from a cache line that is held in a windowed hold state by a second processor, wherein the windowed hold state enables the second processor to provide data in the cache line to the first processor;
in response to receiving the non-exclusive fetch request, demoting, by the second processor, the cache line to read-only; and
obtaining, by the second processor, the data in the cache line that is subject to the non-exclusive fetch request.
18 . The method of claim 17 , further comprising:
in response to receiving the non-exclusive fetch request, receiving, by one or more other processors, an indication that the cache line is held in the windowed hold state by the second processor.
19 . The method of claim 18 , wherein the indication prevents the one or more other processors from issuing a fetch request for the cache line.
20 . The method of claim 17 , wherein the second processor sets the cache line to a primed-for-long-hold state in response to receiving the non-exclusive fetch request from the first processor, wherein the primed-for-long-hold state causes an exclusive fetch request for the cache line by one or more other processors to be rejected and permits a read-only request for the cache line by the one or more other processors.