Systems and methods for stacked sensors with electrical insulation
View Patent ↗The present invention relates generally to sensing devices. A stacked SPAD sensor device includes a sensor layer and a logic layer. The sensor layer includes a plurality of SPAD pixels and a peripheral region surrounding the SPAD pixels. An insulation region is configured between the SPAD pixels and the peripheral region to provide electrical insulation. The logic layer includes logic circuits coupled to SPAD pixels. The logic circuits are electrically insulated from the SPAD pixels by the insulation region. There are other embodiments as well.
1 . A stacked SPAD sensor device comprising:
a sensor layer characterized by a first thickness;
a logic layer characterized by a second thickness;
a bonding layer characterized by a third thickness, the bonding layer being positioned between the sensor layer and the logic layer;
an array of SPAD pixel circuits configured in the sensor layer, the array of SPAD pixel circuits including a first pixel circuit and a second pixel circuit, the first pixel circuit comprising a first p-n junction positioned and a first substrate between a first sidewall and a second sidewall, the first p-n junction being characterized by a first operating voltage of at least 10 volts, the second pixel circuit comprising a second p-n junction and a second substrate positioned between the second sidewall and a third sidewall;
a first logic circuit positioned in the logic layer;
one or more insulation walls surrounding the array of SPAD pixel circuits, the one or more insulation walls positioned in the sensor layer, the first substrate being electrically insulated from the logic layer;
a floating region positioned adjacent to the one or more insulation walls, the floating region being electrically insulated from the array of SPAD pixel circuits and providing an insulation between the first logic circuit and the first substrate; and
a first electrical connector positioned in the bonding layer, the first electrical connector being coupled to the first p-n junction and the first logic circuit;
wherein the first substrate operates at a first voltage, the first logic circuit operates a second voltage, the second voltage being lower than the first voltage and the first logic circuit being inoperable at the first voltage, the insulating wall being adjacent to a region electrically coupled to the substrate and the first voltage.
2 . The stacked SPAD sensor device of claim 1 wherein the one or more insulation walls comprising four walls enclosing the array of SPAD pixel circuits.
3 . The stacked SPAD sensor device of claim 1 wherein the first logic circuit is characterized by a second operating voltage of 5 volts or less.
4 . The stacked SPAD sensor device of claim 1 further comprising:
a second logic circuit positioned in the logic layer; and
a second electrical connector positioned in the bonding layer, the second electrical connector being coupled to the second p-n junction and the second logic circuit.
5 . The stacked SPAD sensor device of claim 1 wherein the one or more insulation walls are characterized by a fourth thickness, the fourth thickness being no greater than the first thickness.
6 . The stacked SPAD sensor device of claim 1 further comprising a first passivation layer overlaying the first substrate and a second passivation layer overlaying the second substrate.
7 . The stacked SPAD sensor device of claim 1 wherein the first sidewall comprises a deep trench isolation structure.
8 . The stacked SPAD sensor device of claim 1 further comprising a floating region positioned adjacent to the one or more insulation walls, the floating region being electrically grounded.
9 . The stacked SPAD sensor device of claim 1 further comprising a floating region positioned adjacent to the one or more insulation walls, the float region comprising a dicing surface.
10 . A stacked SPAD sensor device comprising:
a sensor layer characterized by a first thickness;
a logic layer characterized by a second thickness;
a bonding layer interfacing between the sensor layer and the logic layer;
a SPAD pixel circuit comprising a p-n junction positioned and a substrate between a first sidewall and a second sidewall;
a logic circuit positioned in the logic layer;
an insulation region positioned in the sensor layer and coupled to a ground terminal;
an insulation wall separating the SPAD pixel circuit and the insulation region, the insulation wall positioned in the sensor layer, the substrate being electrically insulated from the logic layer; and
a floating region positioned adjacent to insulation wall, the floating region being electrically insulated from the SPAD pixel circuit and providing an insulation between the logic circuit and the substrate;
wherein the first substrate operates at a first voltage, the first logic circuit operates a second voltage, the second voltage being lower than the first voltage and the first logic circuit being inoperable at the first voltage, the insulating wall being adjacent to a region electrically coupled to the substrate and the first voltage.
11 . The stacked SPAD sensor device of claim 10 wherein the insulation region is coupled to the ground terminal through the bonding layer.