Semiconductor device including spacer via structure and method of manufacturing the same
A connection structure for an integrated circuit includes: a 1 st layer including a 1 st metal line; a 2 nd layer, above the 1 st layer, including a 1 st via; and a 3 rd layer, above the 2 nd layer, including a 2 nd metal line connected to the 1 st metal line through the 1 st via, wherein the 1 st via comprises a spacer structure at a side of an upper portion of the 1 st via, the spacer structure comprising an insulation material.
1 . A method of manufacturing a connection structure for an integrated circuit, the method comprising:
forming a 1 st layer comprising a 1 st metal line;
forming a 2 nd layer, above the 1 st layer, comprising an initial via structure vertically connected to the 1 st metal line;
removing an upper portion of the initial via structure from the 2 nd layer to form a hole exposing a top surface of a lower portion of the initial via structure;
forming a spacer layer along a side surface of the hole, wherein the spacer layer has a horizontal thickness that is uniform along the side surface of the hole;
filling the hole with a via material to be combined with the lower portion of the initial via structure to form a 1 st via comprising metal in the 2 nd layer; and
forming a 3 rd layer comprising a 2 nd metal line above the 2 nd layer such that the 1 st via is vertically connected to the 2 nd metal line through metal-to-metal connection.
2 . The method of claim 1 , wherein the forming the 3 rd layer comprises:
forming a 3 rd metal line adjacent to the 2 nd metal line in the 3 rd layer;
isolating the 2 nd metal line from the 3 rd metal line through an interlayer dielectric (ILD) layer; and
isolating the 1 st via from the 3 rd metal line through the spacer layer and the ILD layer.
3 . The method of claim 2 , further comprising:
forming a 4th layer, above the 3 rd layer, comprising a 2 nd via connected to the 3 rd metal line; and
forming a 5th layer, above the 4th layer, comprising a 4th metal line connected to the 2 nd via.
4 . The method of claim 1 , wherein the 1 st via is directly connected to the 2 nd metal line.
5 . The method of claim 2 , wherein a horizontal distance between an upper-right or upper-left edge of the 1 st via contacting the spacer layer and the 3rd metal line is greater than a horizontal distance between the 2 nd metal line and the 3 rd metal line.
6 . The method of claim 2 , wherein a horizontal distance between an upper-right or upper-left edge of the spacer layer, not contacting the 1 st via, and the 3 rd metal line is smaller than a horizontal distance between the 2 nd metal line and the 3 rd metal line.
7 . A method of manufacturing a connection structure for an integrated circuit, the method comprising:
forming a 1 st layer comprising a 1 st metal line;
forming a 2 nd layer, above the 1 st layer, comprising an initial via structure vertically connected to the 1 st metal line;
removing an upper portion of the initial via structure from the 2 nd layer to form a hole exposing a top surface of a lower portion of the initial via structure;
forming a spacer layer along a side surface of the hole, wherein the spacer layer has a horizontal thickness that is uniform along the side surface of the hole;
filling the hole with a via material to be combined with the lower portion of the initial via structure to form a 1 st via comprising metal in the 2 nd layer,
wherein a 3 rd layer is formed to further comprise a 3 rd metal line such that the 3rd metal line is isolated from the 1 st via, and comprises a protrusion in a form of via,
wherein the 3 rd metal line comprises a metal line and the protrusion as a top via, and
wherein the metal line and the protrusion is a single continuous structure without a connection surface therebetween.
8 . The method of claim 7 , wherein the 3 rd metal line has a height greater than the 2 nd metal line by a height of the protrusion.