IP Library › Granted Patent US 12,632,255
Granted Patent B2
US 12,632,255 · App. 18/742,976 · Granted May 19, 2026

Reservation station with multiple entry types

Inventors: Amit Kumar (Fremont, CA); Deepankar Duggal (Sunnyvale, CA); Haoyan Jia (Clarksville, MD); Manjunath Shevgoor (Beaverton, OR); Mridul Agarwal (Saratoga, CA); Nikhil Gupta (Santa Clara, CA)
Assignee: Apple Inc.
G06F9/30043
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Quick Facts
Patent No.
US 12,632,255
App. No.
18/742,976
Granted
May 19, 2026
Kind
B2
Abstract

A reservation station that includes a storage circuit with multiple full and partial entries is disclosed. A given store-data entry of the multiple partial entries may store less data than a given full entry of the multiple full entries. A control circuit may receive a load/store operation and, in response to a determination that the load/store operation includes only a single source, store the load/store operation in a particular partial entry of the multiple partial entries.

Claims (70)

1 . An apparatus, comprising:

a primary storage circuit including a plurality of full entries and a plurality of partial entries, wherein a given full entry of the plurality of full entries is configured to store a first amount of data, and wherein a given partial entry of the plurality of partial entries is configured to store a second amount of data less than the first amount of data;

a secondary storage circuit, and

a control circuit configured to:

receive a first load/store operation; and

store the first load/store operation in a particular partial entry of the plurality of partial entries in response to a determination that the first load/store operation includes only a single source; and

transfer a particular store operation from the primary storage circuit to the secondary storage circuit in response to a determination that the particular store operation is delinquent.

2 . The apparatus of claim 1 , wherein the control circuit is further configured to:

receive a second load/store operation; and

store the second load/store operation in a particular full entry of the plurality of full entries in response to a determination that the second load/store operation includes more than one source.

3 . The apparatus of claim 1 , wherein to store the first load/store operation, the control circuit is further configured to:

check for an available credit; and

in response to a determination that no credits are available, store the first load/store operation in a particular full entry of the plurality of full entries.

4 . The apparatus of claim 1 , wherein the primary storage circuit further includes a plurality of load-partial entries, wherein a given load-partial entry of the plurality of load-partial entries is configured to store a third amount of data less than the second amount of data, and wherein the control circuit is further configured to:

receive a second load/store operation; and

in response to a determination that the second load/store operation is a single-source load operation, store the second load/store operation in a particular load-partial entry of the plurality of load-partial entries.

5 . The apparatus of claim 4 , wherein the control circuit is further configured to:

link a different full entry of the plurality of full entries to a different load-partial entry of the plurality of load-partial entries to form a pair entry; and

store a third load/store operation in a portion of the pair entry in response to a determination that the third load/store operation has multiple sources and that there are no free full entries in the plurality of full entries.

6 . The apparatus of claim 1 , wherein to transfer the particular store operation, the control circuit is further configured to select an oldest delinquent entry of a plurality of delinquent entries.

7 . A method, comprising:

receiving, by a reservation station, a first load/store operation, wherein the reservation station includes a primary storage circuit including a plurality of full entries, and a plurality of partial entries, wherein a given full entry of the plurality of full entries is configured to store a first amount of data, and wherein a given partial entry of the plurality of partial entries is configured to store a second amount of data less than the first amount of data, and wherein the reservation station further includes a secondary storage circuit;

checking, by the reservation station, first characteristics of the first load/store operation;

storing, by the reservation station, the first load/store operation in a particular partial entry of the plurality of partial entries in response to determining that the first load/store operation includes only a single source; and

transferring a particular store operation from a particular full entry of the plurality of full entries to the secondary storage circuit in response to determining that a store address associated with the particular store operation has been available for use for a threshold number of cycles without store data associated with the particular store operation being available for use.

8 . The method of claim 7 , further comprising:

receiving, by the reservation station, a second load/store operation;

checking, by the reservation station, second characteristics of the second load/store operation; and

storing the second load/store operation in a particular full entry of the plurality of full entries in response to determining that the second load/store operation includes more than one source.

9 . The method of claim 7 , further comprising:

receiving, by the reservation station, a second load/store operation that includes a single source;

checking, by the reservation station, for an available credit associated with the plurality of partial entries; and

storing, by the reservation station in response to determining that no credits are available, the second load/store operation in a particular full entry of the plurality of full entries.

10 . The method of claim 7 , further comprising:

requesting, by the reservation station, a credit associated with the plurality of partial entries;

storing, by the reservation station in response to receiving the credit, the first load/store operation in the particular partial entry; and

releasing, by the reservation station in response to issuing the first load/store operation, the credit.

11 . The method of claim 7 , wherein the primary storage circuit further includes a plurality of load-partial entries, wherein a given load-partial entry of the plurality of load-partial entries is configured to store a third amount of data less than the second amount of data, and further comprising:

receiving, by the reservation station, a second load/store operation; and

storing, by the reservation station in response to a determination that the second load/store operation is a single-source load operation, the second load/store operation in a particular load-partial entry of the plurality of load-partial entries.

12 . The method of claim 11 , further comprising:

linking, by the reservation station, a different full entry of the plurality of full entries to a different load-partial entry of the plurality of load-partial entries to form a pair entry; and

storing, by the reservation station, a third load/store operation in a portion of the pair entry in response to determining that the third load/store operation has multiple sources and that there is no free full entry in the plurality of full entries.

13 . The method of claim 7 , wherein transferring the particular store operation includes selecting an oldest delinquent entry of a plurality of delinquent entries.

14 . A processor circuit, comprising:

a plurality of execution units; and

a reservation station that includes a primary storage circuit that includes a plurality of full entries and a plurality of partial entries, wherein a given full entry of the plurality of full entries is configured to store a first amount of data, wherein a given partial entry of the plurality of partial entries is configured to store a second amount of data less than the first amount of data, wherein the reservation station further includes a secondary storage circuit, and wherein the reservation station is configured to:

receive a first load/store operation;

check first characteristics of the first load/store operation;

store the first load/store operation in a particular partial entry of the plurality of partial entries in response to a determination that the first load/store operation includes only a single source; and

transfer a particular store operation from the primary storage circuit to the secondary storage circuit in response to a determination that a store address associated with the particular store operation has been available for use for a threshold number of cycles without store data associated with the particular store operation being available for use.

15 . The processor circuit of claim 14 , wherein the reservation station is further configured to:

receive a second load/store operation;

check second characteristics of the second load/store operation; and

store the second load/store operation in a particular full entry of the plurality of full entries in response to a determination that the second load/store operation includes more than one source.

16 . The processor circuit of claim 14 , wherein the reservation station is further configured to:

receive a second load/store operation that includes a single source;

check for an available credit associated with the plurality of partial entries; and

store the second load/store operation in a particular full entry of the plurality of full entries in response to a determination that no credits associated with the plurality of partial entries are available.

17 . The processor circuit of claim 14 , wherein the reservation station is further configured to:

request a credit associated with the plurality of partial entries;

store the first load/store operation in the particular partial entry in response to receiving the credit; and

release the credit in response to issuing the first load/store operation to a given one of the plurality of execution units.

18 . The processor circuit of claim 14 , wherein the primary storage circuit further includes a plurality of load-partial entries, wherein a given load-partial entry of the plurality of load-partial entries is configured to store a third amount of data less than the second amount of data, and wherein the reservation station is further configured to:

receive a second load/store operation; and

store the second load/store operation in a particular load partial entry of the plurality of load-partial entries in response to a determination that the second load/store operation is a single-source load operation.

19 . The processor circuit of claim 18 , wherein the reservation station is further configured to:

link a different full entry of the plurality of full entries to a different load-partial entry of the plurality of load-partial entries to form a pair entry; and

store a third load/store operation in a portion of the pair entry in response to a determination that the third load/store operation has multiple sources and that there is no free full entry in the plurality of full entries.

20 . The processor circuit of claim 14 , wherein to transfer the particular store operation, the reservation station is further configured to select an oldest store operation from a plurality of store operations having corresponding store addresses that have been available for the threshold number of cycles.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2024
From: KUMAR, AMIT; AGARWAL, MRIDUL; GUPTA, NIKHIL; JIA, HAOYAN; SHEVGOOR, MANJUNATH; DUGGAL, DEEPANKAR
To: APPLE INC.
Reel/Frame 067729/0708 →
Continuity (2)
Provisional Application 63553120 · Feb 13, 2024
Related Publication 20250258670A1 · Aug 14, 2025
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