IP Library › Granted Patent US 12,632,919
Granted Patent B2
US 12,632,919 · App. 18/316,181 · Granted May 19, 2026

Methods and apparatus for scalable processing

Inventors: Te-Won Lee (San Diego, CA); Edwin Chongwoo Park (San Diego, CA)
Assignee: SoftEye, Inc.
G06T1/60G06T1/20G06V40/166G06V40/172H04N23/651H04N25/78
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Quick Facts
Patent No.
US 12,632,919
App. No.
18/316,181
Filed
May 11, 2023
Granted
May 19, 2026
Kind
B2
Art Unit
2639
USPC
348/207.99
Abstract

Methods and apparatus for scalable processing. Conventional image sensors read image data in a sequential row-by-row manner. However, image data may be more efficiently processed at different scales. For example, computer vision processing at a first scale may be used to determine whether subsequent processing with more resolution is helpful. Various embodiments of the present disclosure readout image data according to different scales; scaled readouts may be processed using scale specific computer vision algorithms to determine next steps. In addition to scaled readouts of image data, some variants may also provide commonly used data and/or implement pre-processing steps.

Claims (41)

1 . A method, comprising:

exposing an array of photosites to capture light information;

enabling a first row of the array based on a first scale;

reading a first column of the array based on the first scale discharging at least one photosite of the array;

providing a first scaled readout of the array;

enabling a second row based on a second scale;

reading the first column based on the second scale skipping at least one previously discharged photosite of the array; and

providing a second scaled readout of the array, where the first scaled readout and the second scaled readout correspond to a single exposure.

2 . The method of claim 1 , where the first scaled readout comprises a first value from the first column and a first non-sequential value from a second column.

3 . The method of claim 2 , where the second scaled readout comprises a second value from the first column and a second non-sequential value from the second column.

4 . The method of claim 1 , further comprising storing the first scaled readout to a first memory buffer and storing the second scaled readout to a second memory buffer.

5 . The method of claim 4 , further comprising processing the first scaled readout from the first memory buffer while the second scaled readout is written to the second memory buffer.

6 . The method of claim 1 , where enabling the first row of the array comprises enabling shift registers based on the first scale.

7 . The method of claim 1 , where discharging the at least one photosite of the array is distructive preventing re-reading an electrical potential from the at least one photosite.

8 . A camera module, comprising:

an array of photosites arranged by rows and columns;

a scalable row enable logic configured to enable a first row based on a first scale;

a scalable column read logic configured to read a first value from a first column and a second value from a second column in a bit-reversed address order based on the first scale; and

output logic configured to provide a first scaled readout comprising the first value and the second value.

9 . The camera module of claim 8 , where the scalable row enable logic is further configured to enable a second row in the bit-reversed address order based on the first scale.

10 . The camera module of claim 8 , where the output logic comprises a memory buffer.

11 . The camera module of claim 8 , where the output logic comprises a bus and the first scaled readout is signaled to a processor.

12 . The camera module of claim 8 , where the first scale is based on a scale factor, and the scale factor is based on a binary division of a smallest dimension of the array of photosites.

13 . The camera module of claim 8 , where the scalable row enable logic is configured to enable the first row based on a bit-reversed address order based on the first scale.

14 . The camera module of claim 8 , where the bit-reversed address order includes at least one of a row offset and a column offset.

15 . A camera sensor, comprising:

an array of photosites configured to capture light information;

a scalable row enable logic configured to:

enable a first row of the array of photosites based on a first scale; and

enable a second row based on a second scale;

a scalable column read logic configured to:

read a first scaled readout of a first column of the array of photosites based on the first scale discharging at least one photosite of the array of photosites; and

read a second scaled readout of the first column based on the second scale skipping at least one previously discharged photosite; and

output logic configured to:

provide the first scaled readout of the array; and

provide the second scaled readout of the array, where the first scaled readout and the second scaled readout correspond to a single exposure of the array of photosites.

16 . The camera sensor of claim 15 , where the output logic comprises a bus and the first scaled readout and the second scaled readout are signaled to a processor.

17 . The camera sensor of claim 15 , where the output logic comprises a first memory buffer and the first scaled readout is stored in the first memory buffer.

18 . The camera sensor of claim 17 , where the output logic further comprises a second memory buffer and the second scaled readout is stored in the second memory buffer.

19 . The camera sensor of claim 17 , where the output logic further comprises a second memory buffer and the first scaled readout is stored in the second memory buffer and the second scaled readout is stored in the second memory buffer.

20 . The camera sensor of claim 15 , where the first scaled readout is provided before the second scaled readout is completed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2024
From: LEE, TE-WON; PARK, EDWIN CHONGWOO
To: SOFTEYE, INC.
Reel/Frame 068651/0730 →
Continuity (2)
Provisional Application 63340470 · May 11, 2022
Related Publication 20230368328A1 · Nov 16, 2023
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